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Layout contact hole pitch amplification method

A technology of contact holes and contact hole arrays, which is applied in special data processing applications, instruments, electrical digital data processing, etc., can solve problems that cannot be completed quickly, and achieve the effect of realizing design automation, improving work efficiency, and reducing error rates

Active Publication Date: 2015-12-23
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

If the pitch of 0.16 microns is enlarged to 0.18 microns, tens of thousands of contacts need to be modified manually, which cannot be done quickly manually

Method used

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  • Layout contact hole pitch amplification method
  • Layout contact hole pitch amplification method
  • Layout contact hole pitch amplification method

Examples

Experimental program
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Embodiment Construction

[0025] Such as figure 1 As shown, it is a flow chart of a method for enlarging the pitch of layout contact holes 103 according to an embodiment of the present invention; figure 2 As shown, it is a schematic diagram of the block 102 division of the method of the embodiment of the present invention; image 3 As shown, it is a schematic diagram of the minimum enclosing rectangle of the block 102 of the method of the embodiment of the present invention; the method of the embodiment of the present invention includes the following steps:

[0026] Step 11, searching downwards from the top layer of the layout data until the bottom layer layout data 101 is obtained; the layout data is a hierarchical structure, and each layer from the top layer down to the bottom layer includes the layout data corresponding to each layer, Let the layout data corresponding to each layer be layer layout data 101 .

[0027] Step 12. Starting from the bottommost layer layout data 101, enlarge the pitch o...

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PUM

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Abstract

The invention discloses a layout contact hole pitch amplification method. Layout data adopts a layered structure. The contact hole pitch amplification method for layout data of each layer comprises the following steps of: step 1, according to distribution of contact holes, performing block division on the layout data of each layer; step 2, moving and calculating the contact holes of block data of the layout data of each layer: step 21, extracting a minimum enclosing rectangle of the block data; step 22, by taking 4 vertexes of the minimum enclosing rectangle as reference points, moving the contact holes, calculating the number of the moved contact holes, selecting the vertex with the maximum number of the moved contact holes as a final reference point, and moving the contact holes for pitch amplification of the contact holes. and Step 3, combining the block data after the contact hole pitch amplification. The layout contact hole pitch amplification method can realize design automation, improve the work efficiency and realize repeated use of partial layout data.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for enlarging the pitch of contact holes in a layout. Background technique [0002] The existing method of enlarging the contact hole (Contact) spacing (space) of the layout often adopts manual adjustment. For example, the existing 95nm process board library needs to enlarge the Contactspace of the original 90nm process board library. Using the existing manual adjustment method is very time-consuming and expensive. Easy to draw wrong. Because, the more advanced the technology is, the larger the scale of the physical layout data is, and there are often tens of thousands of contact data in an IP layout data. If the pitch of 0.16 microns is enlarged to 0.18 microns, tens of thousands of contacts need to be modified manually, which cannot be done quickly manually. Contents of the invention [0003] The technical problem to be solved by the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 张兴洲
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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