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a flash chip

A chip and type of technology, applied in the direction of information storage, static memory, instruments, etc., can solve the problems of high production cost and low flexibility, and achieve the effect of saving chip cost and reducing production cost

Active Publication Date: 2019-09-17
GIGADEVICE SEMICON (BEIJING) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Traditional NAND Flash can be divided into two types: SPI (Serial Peripheral Interface, Serial Peripheral Interface) and ONFI (Open NAND Flash Interface, Open NAND Flash Interface). These two types of NAND Flash are produced separately and packaged separately, so Less flexibility and higher production costs

Method used

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Embodiment 1

[0040] refer to figure 1 , shows a structural block diagram of a Flash chip according to an embodiment of the present invention. In the embodiment of the present invention, the Flash chip may include multiple multiplexing interfaces 101 and multiple dedicated interfaces 102, figure 1 The ellipsis in indicates that there is at least one multiplexed interface between the shown two multiplexed interfaces, and there is at least one dedicated interface between the two shown dedicated interfaces.

[0041] Wherein, the multiplexing interface 101 is compatible with interfaces with corresponding functions in SPI-type NAND Flash and ONFI-type NAND Flash. The functions of some interfaces in SPI-type NAND Flash and ONFI-type NAND Flash are corresponding. For the interfaces corresponding to these functions in the above two types of NAND Flash, the same multiplexing interface can be used for multiplexing The two functions correspond to the interface, so the multiplexing interface can real...

Embodiment 2

[0046] refer to figure 2 , shows a schematic diagram of an interface of a Flash chip according to Embodiment 2 of the present invention. Such as figure 2 As shown, the Flash chip in the embodiment of the present invention may include a multiplexing power supply interface VCC, a multiplexing grounding interface VSS, a multiplexing chip enabling interface CE# (Chip Enable, chip enabling, before operating the chip, select this Chip can only be operated), multiplexed control interface SCLK / RE# (Read Enable, read enable, before reading data, make RE# valid), 4 multiplexed input and output interfaces IO0~IO3, dedicated write enable Interface WE# (Write Enable, write enable, WE# must be enabled before writing and fetching data), dedicated address latch enable interface ALE (Address Latch Enable, address latch enable, before inputting an address, must First set ALE enable in the mode register), special command latch enable interface CLE (Command Latch Enable, command latch enable,...

Embodiment 3

[0055] refer to Figure 5 , shows a schematic diagram of an interface of a Flash chip according to Embodiment 3 of the present invention. Such as Figure 5 As shown, the Flash chip in the embodiment of the present invention may include a multiplexed power supply interface VCC, a multiplexed ground interface VSS, a multiplexed chip enable interface CE#, a multiplexed control interface SCLK / RE#, and four multiplexed input and output interfaces IO0~IO3, dedicated write enable interface WE#, dedicated address latch enable interface ALE, dedicated command latch enable interface CLE, dedicated write protection interface WP#, dedicated status identification interface R / B# and 12 dedicated input and output Interface IO4~IO15.

[0056]Among them, multiplexed power supply interface VCC, multiplexed ground interface VSS, multiplexed chip enable interface CE#, multiplexed control interface SCLK / RE#, 4 multiplexed input and output interfaces IO0~IO3, dedicated write enable interface WE# ...

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Abstract

The invention discloses a Flash chip. The Flash chip comprises multiple multiplex interfaces and multiple special interfaces, wherein the multiplex interfaces can be compatible with functional equivalent interfaces in SPI-type NAND Flash and ONFI-type NAND Flash; and the special interfaces are corresponding to other interfaces except the functional equivalent interfaces in the ONFI-type NAND Flash. By different packaging modes, the Flash chip is packaged as the SPI-type NAND Flash or the ONFI-type NAND Flash. According to the invention, the SPI-type NAND Flash or ONFI-type NAND Flash can be realized in the same chip, so as to reduce production costs. In addition, area of the chip can be controlled by the mode of port reuse. Thus, costs of the chip are saved.

Description

technical field [0001] The invention relates to the technical field of chips, in particular to a Flash chip. Background technique [0002] Non-volatile memory refers to a memory that can still retain data after power failure, that is, the stored data will not be lost after power failure. Both Flash (flash memory) and EEPROM (Electrically Erasable Programmable Read-Only Memory, Electrically Erasable Programmable Read-Only Memory) are non-volatile memories. Flash is a variant of EEPROM. The difference between Flash and EEPROM is that EEPROM can be deleted and rewritten at the byte level instead of erasing the entire chip, while Flash requires block erasing. NAND Flash is a kind of Flash, which uses a nonlinear macro-cell mode inside, providing a cheap and effective solution for the realization of solid-state large-capacity memory. NAND Flash has the advantages of large capacity and fast rewriting speed, and is suitable for storing large amounts of data, so it has been more a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/06G11C16/26
Inventor 苏志强丁冲陈立刚谢瑞杰
Owner GIGADEVICE SEMICON (BEIJING) INC