Implementing method of grid sequencing in semiconductor process simulation
A technology of process simulation and implementation method, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve the problems of following others, unable to add semiconductor physical characteristics parameters to the model, expensive and other problems
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[0021] In order to make the technical means, creative features, goals and practical effects realized by the present invention easy to understand, the present invention will be further explained below in conjunction with illustrations and specific embodiments:
[0022] In this implementation example, the specific simulation process is as follows:
[0023] 1. According to the input command parameters, the finite element mesh is divided and labeled for the simulation area. The larger the simulation area, the more grids after division. The subsequent numerical solution needs to discretize the nonlinear partial differential equation into a linear equation on the divided grid, so the quality of the topology between the grids is directly related to whether the numerical solution converges and the speed of the convergence. For this, the present invention adopts two kinds of grid labeling methods: bottom-up natural sorting method (such as figure 2 ) and the matrix bandwidth minimiza...
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