Gate driving circuit unit and gate driving circuit

A gate drive circuit and drive circuit technology, applied in the electronic field, can solve problems such as large threshold voltage range, slow circuit operation speed, and reduced conductivity, so as to expand the adaptable range of threshold voltage, reduce rise/fall time, and speed up The effect of charging speed

Active Publication Date: 2016-03-23
PEKING UNIV SHENZHEN GRADUATE SCHOOL
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when the threshold voltage of the TFT is positive, the operating speed of the circuit will become very slow due to the decline in the conductivity of the transistors connected in series.
Therefore, conventional GOA circuits cannot adapt to a large threshold voltage range
In addition, other GOA circuits also have the disadvantages of high power consumption, complex structure and high cost

Method used

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  • Gate driving circuit unit and gate driving circuit
  • Gate driving circuit unit and gate driving circuit
  • Gate driving circuit unit and gate driving circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0038] Such as figure 1 As shown, the gate drive circuit unit (that is, the shift register unit) of this embodiment includes a drive control module 11, a drive module 12, a low-level maintenance module 13, a scan signal output terminal VOUT1, a transfer signal output terminal VOUT2, and a pulse signal The input terminal VI1, the high level terminal VH, the first clock signal terminal VA, the second clock signal terminal VB, the third clock signal terminal VC, the first low level terminal VL1, and the second low level terminal VL2.

[0039] The scanning signal output terminal VOUT1 is connected to the row scanning line on the display panel, and the signal output terminal VOUT2 is used as the first pulse signal input terminal of the gate driving circuit unit of the next stage.

[0040]The drive control module 11 is connected to the pulse signal input terminal VI1, the high level terminal VH, the second clock signal input terminal VB, the drive module 12, the transmission signal ...

Embodiment 2

[0079] Such as Figure 5 As shown, the difference between this embodiment and Embodiment 1 is that the second current conduction electrode (source) of the fourth transistor T4 of the gate drive circuit unit of this embodiment receives the third clock signal input terminal VC through the third clock signal input terminal VC. clock signal, this circuit can reduce the leakage current passing through T4 and T2 from the signal output terminal VOUT2, further reducing the power consumption of the circuit. The connection mode of other modules and components in this embodiment is the same as that of the corresponding modules and components in Embodiment 1, and the principle of the working process is the same, so it will not be repeated here.

Embodiment 3

[0081] Such as Image 6 As shown, the difference between the present embodiment and the first embodiment is that the low-level maintaining module 13 of the gate driving circuit unit of the present embodiment further includes a twelfth transistor T12 and an initialization signal terminal VR. The control electrode of the twelfth transistor T12 is used to receive the initialization signal V through the initialization signal terminal VR R , its first current conduction pole is used to receive a high level through the high level terminal VH, and its second current conduction pole is connected to the control pole of the tenth transistor T10, the control pole of the eleventh transistor T11, the ninth transistor T9 The first current conduction pole, that is, the second current conduction pole thereof is connected to the sustain control terminal P.

[0082] The twelfth transistor T12 is used when the initialization signal V R When the high level comes, the maintenance control termina...

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PUM

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Abstract

The invention discloses a gate driving circuit unit and a gate driving circuit. The gate driving circuit unit comprises a driving control module, a driving module, a low-level maintaining module, a scanning signal output end and a transmission signal output end. The driving control module further comprises bootstrap series units. The gate driving circuit comprises the gate driving circuit units in N-grade cascade connection. The driving control module of the gate driving circuit unit controls the driving module to be in a charging or discharging state according to an input signal; the driving module charges the scanning signal output end and the transmission signal output end in a charging state and discharges the scanning signal output end and the transmission signal output end in a discharging state. According to the design of bootstrap series units, when the threshold voltage of a transistor is negative, electric leakage at a driving control end can be inhibited; when the threshold voltage of the transistor is positive, charging of the driving control end can be accelerated, so that rising/dropping time of an output signal is shortened, and the threshold voltage application range of the circuit is expanded.

Description

technical field [0001] The present application relates to the field of electronic technology, in particular to a gate drive circuit unit and a gate drive circuit, and in particular to a gate drive circuit unit and a gate drive circuit in the field of flat panel display. Background technique [0002] Flat panel display (FPD, Flat-Panel-Display) has become the mainstream of display technology, and is developing in the direction of high frame rate, high resolution, and narrower frame in recent years. Integrated gate drive circuit (GateDriveronArray, GOA) means that the gate drive circuit of the flat panel display is fabricated on the display panel together with the pixel TFT in the form of thin-film transistor (TFT, Thin-filmtransistor), and is driven by the traditional IC (integrated circuit) Compared with other methods, the use of GOA can not only reduce the number of peripheral driver chips and their sealing procedures, reduce costs, but also make the periphery of the displa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09G3/20
Inventor 张盛东胡治晋廖聪维曹世杰曾丽媚李长晔
Owner PEKING UNIV SHENZHEN GRADUATE SCHOOL
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