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Integrated test sequence generating method based on SysML module diagrams

A technology of integrated testing and sequence generation, applied in software testing/debugging, error detection/correction, instrumentation, etc., can solve problems such as consistency verification and analysis of difficult embedded real-time systems, and achieve improved testing efficiency, full integration testing, and responsiveness fast effect

Active Publication Date: 2016-06-15
NANCHANG HANGKONG UNIVERSITY
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  • Application Information

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Problems solved by technology

[0004] Although the above methods can partly achieve the test requirements by modeling the system, in general, these methods model the system structure from the software level, and it is difficult to perform complex embedded real-time systems including hardware devices. Consistency Verification Analysis

Method used

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  • Integrated test sequence generating method based on SysML module diagrams
  • Integrated test sequence generating method based on SysML module diagrams
  • Integrated test sequence generating method based on SysML module diagrams

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Embodiment approach

[0027] The invention is an integrated test sequence generation method based on a SysML module diagram in embedded software testing, figure 1 It is a flowchart of the present invention, and its specific implementation is as follows:

[0028] S1. Analyze the requirements and design of the embedded software system to be tested, and draw a SysML module diagram in the model-driven visual development software Rhapsody, where the module definition diagram is used to describe the functional combination relationship between modules, and the internal module diagram is used to describe the data between modules Exchange situation. The block diagram is then exported as an Extensible Markup Language (XMI) file format based on metadata interchange.

[0029] S2. Parse the XMI file, and extract basic elements such as modules, associations, dependencies, and interactions in the module graph.

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Abstract

The invention discloses an integrated test sequence generating method based on SysML module diagrams. The method is applicable to an embedded system having higher integration complex and more crosslinking relations among application systems. An integrated test strategy from constraint to combination, from pairing to grouping, from inside to outside and from bottom to top is provided according to the logic functional combination relation of the embedded system; modeling is conducted on the strategy by analyzing the demands and design of the system and by using the SysML module diagrams; the SysML module diagrams are analyzed and converted into directed graphs; a relevant module branch coverage criterion is provided according to the combination relation of functional modules; a key module coverage criterion is provided according to existing data exchange of the modules; then directed graphs are traversed under the guidance of the coverage criterions to automatically generate an integrated test sequence set. The integrated test sequence generating method combines with a model driven engineering technology, achieves automatic test sequence generation and improves the software testing efficiency.

Description

technical field [0001] The invention relates to the field of computer software testing, and mainly relates to a method for generating an integrated test sequence based on a SysML module diagram. Background technique [0002] There are complex logic relations in the embedded real-time system, and it has been widely used in aviation, military and other fields. As the concept of softwareization of aviation equipment becomes more and more obvious, software has become the core of flight control, fire control, avionics and maintenance support. In the flight control system of Boeing 757, the part of the code that supports system redundancy management and fault detection exceeds 55% of the entire code. However, the rapid growth in system size and complexity has increased the number of use cases required for testing by orders of magnitude. How to reasonably design test cases is a key issue in the field of software testing. The essence of the automatic generation of test cases is t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36
CPCG06F11/3684
Inventor 舒坚郑春杨丰玉樊鑫胡正郑巍
Owner NANCHANG HANGKONG UNIVERSITY
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