Inverse time-delay booster circuit
A technology of boosting circuit and phase delay, which is applied in the direction of electrical components, adjusting electric variables, instruments, etc., can solve the problems of increasing the difficulty of the circuit, large inductance, easy to damage the chip circuit, etc., to achieve stable driving force, small size, The effect of excellent pressure resistance
Inactive Publication Date: 2016-06-15
中山芯达电子科技有限公司
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Problems solved by technology
The boost method commonly used in ordinary circuits is a flyback boost circuit, which is composed of switching elements, inductors and capacitors, and the application of inductive components in chips will increase the difficulty of circuit design. First, the inductor is large in size, and second It is the oscillating electromotive force that is easy to damage the chip circuit
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[0010] Attached as follows figure 1 , to further describe the application scheme:
[0011] An inverting time-delay boost circuit, comprising a PMOS transistor Q1, an NMOS transistor Q2, a PMOS transistor Q3, an NMOS transistor Q4 and an inverter T1, the PMOS transistor Q1 and the NMOS transistor Q2 are connected in series between a first power supply terminal and ground Between the terminals, the gates of the two are commonly connected to the input terminal of the circuit, and the series node of the two is connected to the input terminal of the inverter T1; the PMOS transistor Q3 and the NMOS transistor Q4 are connected in series to the second Between the power supply terminal and the ground terminal, the gates of the two are commonly connected to the output terminal of the inverter T1, and the series node of the two is connected to the output terminal of the circuit; the voltage of the second power supply terminal is greater than that of the first power supply terminal Volta...
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Aiming at the boosting requirements of chip integrated circuits, the present invention proposes an inverse time delay boosting circuit, which is characterized in that it includes a PMOS transistor Q1, an NMOS transistor Q2, a PMOS transistor Q3, an NMOS transistor Q4 and an inverter T1. The PMOS transistor Q1 and the NMOS transistor Q2 are connected in series between the first power supply terminal and the ground terminal, the gates of the two are commonly connected to the input terminal of the circuit, and the series junction of the two is connected to the input of the inverter T1 The PMOS transistor Q3 and the NMOS transistor Q4 are connected in series between the second power supply terminal and the ground terminal, the gates of the two are commonly connected to the output terminal of the inverter T1, and the series junction of the two is connected to the circuit The voltage of the second power supply terminal is greater than the voltage of the first power supply terminal. The invention can provide stable boost for chip integrated circuits and meet the driving force requirements for subsequent circuits.
Description
technical field [0001] The invention relates to an inverting time-delay boost circuit applied in chip integrated circuits. Background technique [0002] The boost function is commonly used in chip integrated circuits, which upgrades the low-level voltage into the required high-level voltage output to meet the driving force requirements. The boost method commonly used in ordinary circuits is a flyback boost circuit, which is composed of switching elements, inductors and capacitors, and the application of inductive components in chips will increase the difficulty of circuit design. First, the inductor is large in size, and second It is the oscillating electromotive force that easily damages the chip circuit. In fact, what the chip integrated circuit needs is a steady boost, and its output voltage does not need to be very high. Contents of the invention [0003] Aiming at the boosting requirements of chip integrated circuits, the present invention proposes an inverting time...
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IPC IPC(8): H02M3/155
CPCH02M3/155
Inventor 方镜清
Owner 中山芯达电子科技有限公司