Multi-core platform oriented multithreaded division and static balancing scheduling policy

A scheduling strategy and multi-threading technology, applied in multi-programming devices, resource allocation, program control design, etc., can solve problems such as program performance degradation, affecting program performance, and unbalanced thread loads

Active Publication Date: 2016-06-22
NANJING UNIV OF POSTS & TELECOMM
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, dynamic scheduling does not dynamically assign tasks to idle threads until the running phase. Dynamic scheduling does not need to care too much about the size of the loop body and the scale of loop iteration tasks, and can obtain good load balancing performance. At the same time, it will also bring Certain scheduling overhead
Moreover, in the existing parallel computing process, due to the overhead of creating, canceling and scheduling each thread, after some computing tasks are parallelized by multi-threads, the program performance will be greatly reduced; in addition, for computing tasks suitable for multi-threaded parallelism, in the During task scheduling, it is necessary to assign tasks to multiple threads. Static scheduling decomposes tasks and distributes them to each thread almost equally before the program runs. When the size of the decomposed tasks varies greatly, the load among the threads will be extremely uneven. Balance, affecting program performance

Method used

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  • Multi-core platform oriented multithreaded division and static balancing scheduling policy
  • Multi-core platform oriented multithreaded division and static balancing scheduling policy
  • Multi-core platform oriented multithreaded division and static balancing scheduling policy

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Embodiment Construction

[0028] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0029] like figure 1 As shown, a kind of multi-thread division and static balance scheduling strategy for multi-core platform designed by the present invention is characterized in that, comprising the following steps:

[0030] Step 001. Initialize the load G_load corresponding to each thread of the system m = 0, G_load m Indicates the load corresponding to the mth thread of the system, m={1,...,M}, M indicates the number of system threads; then divide the tasks to be processed to obtain task blocks whose calculation logic is independent of each other to form task blocks Set, and each task block cannot be further divided, and enter step 002.

[0031] Step 002. For the set of task blocks, each task block unit is used as the analysis object, and the source code position of entering and exiting each task block is used as th...

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Abstract

The present invention relates to a multi-core platform oriented multi-threaded division and static balancing scheduling policy, and brings about the concept of a granularity parameter for assessing a size of a task acquired through decomposing. First, according to a determination condition, it is determined whether a task is really applicable to multi-threaded parallel processing; secondly, a static scheduling policy is used, and compared with that in dynamic scheduling, scheduling overheads in the operating phase do not exist; and finally, different from that in an ordinary static scheduling policy, the present invention brings about a heuristic static scheduling policy, so that the problem that during static scheduling, huge size differences between tasks acquired through decomposing cause load on threads to be extremely unbalanced is taken into account; and the task block granularity is acquired, and therefore task blocks that are greatly different can be assigned to different threads, thereby making load be balanced.

Description

technical field [0001] The invention relates to a multi-thread division and static balanced scheduling strategy for a multi-core platform, belonging to the field of parallel computing. Background technique [0002] Improving processor performance generally depends on two aspects: one is the development of processor architecture; the other is the continuous progress of semiconductor technology. Stanford University in the United States proposed an on-chip multi-core processor. In order to improve the computing power of the processor, multiple cores are integrated into one processor chip. The easiest, simplest and most basic way to achieve it is multi-core. As early as the end of last century, IBM and Hewlett-Packard had proposed the feasibility design of dual-core processors. In April 2005, Intel launched the Intel Pentium D processor, a desktop product based on multi-core technology, in the world, officially announcing the advent of the x86 processor multi-core era. [0003...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50G06F9/48
CPCG06F9/4843G06F9/5038
Inventor 付雄汤中睿邓松程春玲王俊昌
Owner NANJING UNIV OF POSTS & TELECOMM
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