Integrated Fan-Out Structure with Openings in Buffer Layer

Abstract

A package includes a molding compound, a through-via penetrating through the molding compound, a device die molded in the molding compound, and a buffer layer on and contacting the molding compound. An opening is through the buffer layer to the through-via. The buffer layer has ripples in a plane parallel to an interface between the molding compound and the buffer layer and around a circumference of the opening. Other embodiments contemplate an additional package bonded to the package, and methods for forming the package.

Description

[0001] This application is a continuation-in-part of US Patent Application Serial No. 14 / 024,311, filed September 11, 2013, entitled "Integrated Fan-Out Structure with Guiding Trenches in Buffer Layer," the entire contents of which are hereby incorporated by reference. technical field [0002] The present invention generally relates to the field of semiconductors, and more particularly, to packaging of semiconductors. Background technique [0003] As semiconductor technology develops, semiconductor chips / die become smaller and smaller. At the same time, more functions need to be integrated into the semiconductor die. As a result, semiconductor dies need to pack more and more I / O pads into a smaller area, so the density of I / O pads increases rapidly over time. As a result, packaging of the semiconductor die becomes more difficult, which can adversely affect packaging yield. [0004] Conventional packaging techniques can be divided into two categories. In the first category...

AI Technical Summary

Problems solved by technology

Therefore, under the condition that the solder ball size is required to be fixed, the solder ball must be of a specific size, which in turn limits the number of solder balls that can be packaged onto the die surface

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