Public bicycle management system

[0029] The structure and working process of the present invention will be further described below.

[0030] A public bicycle management system includes a remote monitoring unit, a bicycle storage unit, a bicycle transport unit, and a dispatching unit; the remote monitoring unit includes a data processor, a display, a memory, and a data transceiver. The data processor is used to receive bicycle storage. The data information of the unit, and send control signals to the bicycle transport unit and the dispatch unit, the display is used to display the status information of the bicycle storage unit, the memory is used to store the system initialization data and the intermediate data of the system operation; the data transceiver is used to communicate with the bicycle storage unit , The bicycle transport unit and the dispatch unit exchange data; the bicycle storage unit includes a fixed parking space, an anti-theft device, a bicycle client, and a monitoring module. Among them, the fixed parking space is used to store the bicycle, and the anti-theft device is used to lock the bicycle in the fixed parking space. To prevent theft, the bicycle client is used by the user, the monitoring module is used to monitor the status information of the bicycle storage unit; the bicycle transport unit is used to transport the bicycle to the bicycle storage unit; the dispatch unit is used to transfer the bicycle and the bicycle between the bicycle storage units The bicycles between the bicycle garage and the bicycle storage unit are dispatched.

[0031] The bicycle client includes a coin slot, a coin outlet, a currency identification module, a data processing module, a timing module, a display module, an alarm module, and a locking module. The coin slot is used to deposit coins; the currency identification module recognizes coin insertion The denomination of the coin deposited in the mouth is sent to the data processing module, and the data processing module judges the denomination of the received coin. If it meets the requirements, the locking module is activated to unlock; otherwise, the locking module remains in the locked mode; when the locking module is unlocked, the timing module starts Timing, when the timing time of the timing module reaches the preset time, it sends timing information to the data processing module. According to the received timing time, the data processing module prompts the user to perform corresponding operations through the display module and the alarm module. After being locked in the designated place, the data processing module judges the collected amount according to the received timing time, and outputs the remaining coins through the coin outlet.

[0032] The locking module includes a fixed post installed in a designated area and a car lock installed on the bicycle. When the car lock matches the fixed post, the car lock can activate the locking mode; otherwise, the car lock is in the open mode.

[0033] The timing time of the timing module is within a specified time, and the bicycle is a free use time. If the specified time is exceeded, the charge is charged according to the preset time period.

[0034] The currency types received by the coin slot include coins and banknotes, and the minimum denomination of the currency types received by the coin slot is 1 yuan.

[0035] The central processing unit of the data processing module is one of a single chip microcomputer, a DSP, and an FPGA.

[0036] The central processor of the data processing module is one of the Spartan-6 series FPGA chips of Xilinx Company.

[0037] In this embodiment, the XC6SLX16 chip in the Spartan-6 series of Xilinx's chips is used as the main processor. The Spartan-6 series not only has industry-leading system integration capabilities, but also achieves the lowest total cost suitable for mass applications. The series consists of 13 members, and the available density ranges from 3840 logic units to 147443 logic units. Compared with the previous generation Spartan series, this series consumes only 50% of its power consumption, and is faster and has more comprehensive connection functions. The Spartan-6 series is manufactured using mature 45nm low-power copper process technology, achieving a perfect balance of cost performance and power consumption, and can provide a new and more efficient dual-register 6-input look-up table (LUT) logic and a series of rich built-in systems Level modules, including 18Kb (2 x 9Kb) Block RAM, second-generation DSP48A1 Slice, SDRAM memory controller, enhanced mixed-mode clock management module, SelectIO™ technology, power-optimized high-speed serial transceiver module, PCI Express® Compatible with endpoint modules, advanced system-level power management modes, automatic detection configuration options, and enhanced IP security through AES and Device DNA protection functions. These excellent features provide a low-cost programmable alternative to custom ASIC products with unprecedented ease of use. Spartan-6 FPGA can provide the best solution for high-volume logic design, consumer-oriented DSP design, and cost-sensitive embedded applications. Spartan-6 FPGA has laid a solid foundation for programmable chips and is very suitable for a target design platform that can provide integrated software and hardware components, so that designers can concentrate on innovation at the beginning of development work.

[0038] Spartan-6 FPGA also has the following features:

[0039] 1. The Spartan-6 FPGA logic unit rating fully reflects the more powerful logic unit capabilities of the latest 6-input LUT architecture.

[0040] 2. Each Spartan-6 FPGA slice contains 4 LUTs and 8 flip-flops.

[0041] 3. Each DSP48A1 slice contains an 18x18 multiplier, an adder and an accumulator.

[0042] 4. Block RAM is basically 18Kb in size. Each module can also be used as two independent 9Kb modules.

[0043] 5. Each CMT contains two DCMs and one PLL.

[0044] 6. The memory controller module is not supported at the -3N speed level.

[0045] The technical staff can choose the specific model suitable for the project according to the needs of the input.

[0046] The above-mentioned embodiments of the present invention are merely examples to clearly illustrate the present invention, and are not intended to limit the implementation of the present invention. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. It is unnecessary and impossible to list all the implementation methods here. And these obvious changes or variations derived from the essential spirit of the present invention still belong to the protection scope of the present invention.