CPU power-on time sequence control method, device and system

A technology of power-on sequence and control method, applied in the field of information processing, can solve the problems of threatening server security, unable to power-on sequence control, etc.

Inactive Publication Date: 2016-08-24
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] It can be seen that in the above technical solution, the BMC cannot control the power-on sequence of each component in the server. An intruder may tamper w

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  • CPU power-on time sequence control method, device and system
  • CPU power-on time sequence control method, device and system
  • CPU power-on time sequence control method, device and system

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Embodiment Construction

[0044] In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work are protected by the present invention. scope.

[0045] like figure 1 As shown, an embodiment of the present invention provides a CPU power-on sequence control method, and the method may include the following steps:

[0046] S0: preset signal output device;

[0047] S1: After the external server is powered on, send a CPU power-down command to the signal output device;

[0048] S2: use the s...

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Abstract

The invention provides a CPU power-on time sequence control method, device and system. The method includes the steps that S0, a signal output device is pre-arranged; S1, after an external server is switched on, a CPU power-off instruction is sent to the signal output device; S2, a first control signal is sent to an external server CPU by utilizing the signal output device according to the received CPU power-off instruction, so that the CPU is not powered on; S3, whether a basic input/output system program of the external server is tampered or not is detected; S4, when the basic input/output system program of the external server is not tampered, the CPU power-off instruction is sent to the signal output device; S5, a second control signal is sent to the external server CPU by utilizing the signal output device according to the received CPU power-off instruction, so that the CPU is powered on. By the adoption of the technical scheme, the security of the server can be improved.

Description

technical field [0001] The present invention relates to the technical field of information processing, and in particular, to a method, device and system for CPU power-on sequence control. Background technique [0002] With the continuous development of computer application technology, the security of the server has also attracted people's attention. [0003] At present, in order to improve the security of the server, it is usually necessary to configure a special BMC (Baseboard Management Controller) for the server to monitor the physical characteristics of some components in the server under the current working state in real time, such as fan speed, CPU (Central Processing Unit, central processing unit) input voltage, working temperature, whether the basic input and output system program has changed, etc., so that the staff can manage the server accordingly according to the monitoring results. [0004] It can be seen that in the above technical solution, the BMC cannot con...

Claims

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Application Information

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IPC IPC(8): G06F1/30G06F1/06
CPCG06F1/30G06F1/06
Inventor 苏振宇
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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