Supercharge Your Innovation With Domain-Expert AI Agents!

Power chip testing device and method

A power chip and test device technology, applied in the field of power chip test devices, can solve problems such as low test efficiency, achieve the effects of simplifying workload, improving test efficiency, and solving complex and time-consuming manual operations

Inactive Publication Date: 2016-08-31
BEIJING XIAOMI MOBILE SOFTWARE CO LTD
View PDF4 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For the first version of the PMU chip, testers are required to verify the performance of each power supply of the first version of the chip, for example, the performance of the chip when the load is from light load to full load, etc. Since it is the performance test of the early chip, in order to reduce costs, usually Testers need to manually test the power supply performance of the first version of the chip, resulting in very low test efficiency

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Power chip testing device and method
  • Power chip testing device and method
  • Power chip testing device and method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0042] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the present invention. Rather, they are merely examples of apparatuses and methods consistent with aspects of the invention as recited in the appended claims.

[0043] Figure 1A is a schematic structural diagram of a testing device for a power chip according to an exemplary embodiment, Figure 1B is one of the schematic diagrams showing the connection relationship between the switch and the load according to an exemplary embodiment, Figure 1C is the second schematic diagram of the connection relationship between the switch and the load shown accordin...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a power chip testing device and method. The device comprises a control module and at least one switching module, wherein each switching module comprises a charge-over switch. Each change-over switch comprises a first port, a second port, and a third port, wherein the first port selects to be connected with the second port or the third port under the action of a control signal generated by the control module, a branch circuit where the first port is located is connected with a power output end of a tested power chip, and a branch circuit where the second port is located and a branch circuit where the third port is located are respectively connected with different loads. The control module is used for outputting a control signal to each change-over switch, and controlling the first port of each change-over switch to be connected with the second port or the third port, collecting voltage values outputted when the power output end of the tested power chip is connected with different loads, and determining the load performances through voltage values. According to the technical scheme of the invention, the device can test the load performances of the power chip in a full-automatic manner.

Description

technical field [0001] The present disclosure relates to the technical field of chip testing, in particular to a testing device and method for a power chip. Background technique [0002] At present, more and more power modules are integrated into a power management chip (Power Management Unit, PMU for short), and the performance requirements are getting higher and higher. For the first version of the PMU chip, testers are required to verify the performance of each power supply of the first version of the chip, for example, the performance of the chip when the load is from light load to full load, etc. Since it is the performance test of the early chip, in order to reduce costs, usually Testers need to manually test the power supply performance of the first version of the chip, resulting in a very low test efficiency. Contents of the invention [0003] In order to overcome the problems existing in the related technologies, the embodiments of the present disclosure provide ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/40
CPCG01R31/40
Inventor 范杰底浩石新明
Owner BEIJING XIAOMI MOBILE SOFTWARE CO LTD
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More