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Programming operation method of flash memory array

The technology of a flash memory array and operation method, which is applied in the field of memory, can solve problems such as flash memory array programming crosstalk, and achieve the effect of reducing difficulty

Active Publication Date: 2019-11-22
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Therefore, prior art flash memory arrays including split-gate flash memory cells have programming crosstalk problems

Method used

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  • Programming operation method of flash memory array
  • Programming operation method of flash memory array
  • Programming operation method of flash memory array

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Embodiment Construction

[0020] As mentioned in the background section, in the prior art, flash memory arrays including split-gate flash memory cells have programming crosstalk problems.

[0021] The inventor of the present application analyzed the prior art. see figure 1 , figure 1 It is a schematic circuit diagram of a partial structure of an existing flash memory array.

[0022] The flash memory array 200 in the prior art may at least include a first split-gate flash memory unit 201 and a second split-gate flash memory unit 202, and the first split-gate flash memory unit 201 and the second split-gate flash memory unit 202 may have source electrodes ( not shown in the figure), a drain (not shown in the figure), a first control gate (not shown in the figure), a word line gate (not shown in the figure) and a second control gate (not shown in the figure).

[0023] The source of the first split-gate flash memory unit 201 is connected to the first bit line BL1, and the drain of the first split-gate fl...

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Abstract

The invention discloses a programming operation method for a flash memory array. The flash memory array at least comprises first split-gate flash memory units and second split-gate flash memory units. The first split-gate flash memory units and the second split-gate flash memory units are respectively provided with source electrodes, drain electrodes, first control gates, word line gates and second control gates; the source electrodes of the first split-gate flash memory units are connected with a first bit line, and the drain electrodes of the first split-gate flash memory units are connected with a second bit line; the source electrodes of the second split-gate flash memory units are connected with the second bit line, the drain electrodes of the second split-gate flash memory units are connected with the first bit line, alternately, the source electrodes of the second split-gate flash memory units are connected with the first bit line, and the drain electrodes of the second split-gate flash memory units are connected with the second bit line. The programming operation method includes applying first negative voltages to a first control gate line for the second split-gate flash memory units when programming operation is carried out on the first split-gate flash memory units, and applying second negative voltages to a second control gate line for the second split-gate flash memory units; configuring the first negative voltages and the second negative voltages for constraining programming on the second split-gate flash memory units. According to the scheme, the programming operation method has the advantages that programming crosstalk on the flash memory array during programming operation can be reduced, and the programming operation method is easy to implement.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to a programming operation method of a flash memory array. Background technique [0002] Flash memory (Flash), as a non-volatile memory, has become the mainstream of non-volatile semiconductor storage technology. In various Flash devices, there are basically two types: stacked gate structure and divided gate structure. Among them, the stacked gate structure has the problem of over-erasing, which makes its circuit design complicated; relatively speaking, the divided gate structure is effective. The over-erasing effect is avoided, making the circuit design relatively simple. In addition, compared with the stacked gate structure, the split gate structure uses hot electron injection at the source for programming, which has higher programming efficiency, making the split gate flash memory widely used in various types such as smart cards, SIM cards, microcontrollers, mobile phones, etc. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/10G11C16/34
CPCG11C16/10G11C16/3427
Inventor 杨光军
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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