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Memory device and reading method thereof

A technology of memory and memory unit, which is applied in the direction of static memory, digital memory information, information storage, etc., and can solve the problems of serious reading interference error and reading interference error

Active Publication Date: 2018-11-09
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, when the selected page (page) is being read, if the voltage applied to the gate of the unread page transistor is too high, it may cause read disturbance errors to other unread pages.
Read disturb errors can become more severe if the number of reads is in the thousands or millions

Method used

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  • Memory device and reading method thereof
  • Memory device and reading method thereof

Examples

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Embodiment Construction

[0033] The technical terms in this specification refer to the common terms in the technical field. If some terms are described or defined in this specification, the explanations or definitions in this specification shall prevail. Each embodiment of the present invention has one or more technical features. Under the premise of possible implementation, those skilled in the art can selectively implement some or all of the technical features in any embodiment, or selectively combine some or all of the technical features in these embodiments.

[0034] Please refer to figure 1 , which shows a cross-sectional view of a portion of the memory device 100 according to the first embodiment of the present invention. like figure 1 As shown, the memory device 100 according to the first embodiment of the present invention includes: bit lines BL1-BL3, string select lines (string select lines, SSL) SSL0-SSL3, ground select lines (GSL), and word lines WL1- WLN (N is a positive integer), odd c...

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PUM

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Abstract

The invention discloses a memory device and a reading method thereof. The memory device includes: a plurality of conductive laminated structures, including at least one string of selection lines, a plurality of word lines and at least one ground selection line; a plurality of memory cells formed on these Within the conductive stacked structures, a plurality of bit lines are formed on the conductive stacked structures; and at least one odd common source line and at least one even common source line are formed on the conductive stacked structures. The odd common source line is coupled to a plurality of odd bit lines of the bit lines, and the even common source line is coupled to a plurality of even bit lines of the bit lines.

Description

technical field [0001] The present invention relates to a memory device and a reading method thereof. Background technique [0002] During memory reading, read disturbance errors may occur. The read disturb error refers to the fact that the gate voltage of the memory transistor is too high, so that the electrons of the channel or the electrons / holes in the source / drain are attracted into the floating gate, causing the stored data to change (change from 1 to 1). to 0). For example, when a selected page (page) is being read, if the voltage applied to the gates of the transistors of the unread page is too high, a read disturb error may be caused to other unread pages. Read disturb errors may become more severe if the number of reads is in the thousands or millions. [0003] Therefore, the present invention provides a memory device and a reading method thereof, which can reduce the read disturb error. SUMMARY OF THE INVENTION [0004] The present invention relates to a mem...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/12G11C8/08H01L27/11573H10B43/40H10B69/00
Inventor 张国彬
Owner MACRONIX INT CO LTD
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