Unlock instant, AI-driven research and patent intelligence for your innovation.

Manufacturing method of semiconductor device, semiconductor device and electronic device

A manufacturing method and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as low yield, corrosion of substrate silicon, damage to devices, etc., and achieve high yield Effect

Active Publication Date: 2019-09-27
SEMICON MFG INT (SHANGHAI) CORP
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In some product contact hole generation processes, WF 6 Gas not only with SiH 4 react, and for example when SiH 4 When the inflow is not sufficient; or when there are defects, not dense or thin in the adhesion layer, WF 6 The gas will also react with the silicon substrate at the bottom of the contact hole, corrode the silicon substrate and even damage the devices formed on it, resulting in a very low yield in severe cases
The occurrence of this situation can be reduced by forming a thicker adhesive layer, but when the thickness of the adhesive layer is larger, it will cause the problem of higher contact resistance

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Manufacturing method of semiconductor device, semiconductor device and electronic device
  • Manufacturing method of semiconductor device, semiconductor device and electronic device
  • Manufacturing method of semiconductor device, semiconductor device and electronic device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0035] Combine below Figure 2A ~ Figure 2D A method for fabricating a semiconductor device according to an embodiment of the present invention will be described in detail.

[0036] First, if Figure 2A As shown, a semiconductor substrate 200 is provided, and the surface of the semiconductor substrate 200 has at least one contact hole opening 202 .

[0037]The semiconductor substrate 200 may be at least one of the materials mentioned below: silicon, germanium, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-on-insulator Silicon germanium-on-insulator (SiGeOI) and germanium-on-insulator (GeOI), etc. In addition, other devices, such as PMOS and NMOS transistors, may be formed on the semiconductor substrate. An isolation structure may be formed in the semiconductor substrate, and the isolation structure is a shallow trench isolation (STI) structure or a local oxide of silicon (LOCOS) isolation structure. CMOS devices...

Embodiment 2

[0048] In order to form the protective layer and the metal filling layer more conveniently, the present invention also provides a preferred forming method, combined below Figure 3A ~ Figure 3D The method for forming the protection layer and the metal filling layer proposed by the present invention is described in detail.

[0049] In this embodiment, both the protection layer and the metal layer are formed by chemical vapor deposition. First, if Figure 3A As shown, a semiconductor substrate 300 is provided, the surface of the semiconductor substrate 300 has at least one contact hole opening 302, and the semiconductor substrate is formed with gate structures, active regions, metal silicides on the surface of the active region, etc., for simplicity Only the interlayer dielectric layer 301 is shown for convenience purposes. An adhesive layer 303 covering sidewalls and bottoms of the contact hole opening 302 is formed inside the contact hole opening 302 . The structures of the...

Embodiment 3

[0057] The present invention also provides a semiconductor device manufactured by the method described in Embodiment 1 or 2, comprising a semiconductor substrate, an interlayer dielectric layer located on the semiconductor substrate, and a contact hole formed by the above method.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a manufacture method of a semiconductor device. The method comprises the following steps that a semiconductor substrate is provided, and the surface of the semiconductor device includes at least one contact hole; an adhesion layer which covers the sidewall and the bottom of the contact hole is formed; a protective layer is formed on the adhesion layer; and a metal layer is deposited on the protective layer. According to the manufacture method of the semiconductor device, the protective layer is formed before that metal (tungsten) is filled into the contact hole, and when a metal tungsten layer is formed by chemical vapor deposition later, WF6 is prevented from reacting with silicon in the bottom of the contact hole, further damaging the silicon substrate and causing decrease of the yield rate.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a manufacturing method of a semiconductor device, a semiconductor device and an electronic device. Background technique [0002] With the development of semiconductor technology, the circuit density of integrated circuits, especially VLSI, is increasing, and the number of components contained is also increasing. This development makes the surface of the wafer unable to provide enough area to manufacture all required interconnection wires. In order to meet the requirements of interconnection lines after shrinking components, the design of two or more layers of multilayer metal interconnection lines has become a method commonly used in VLSI technology. At present, the conduction between different metal layers or the metal layer and the substrate layer is to form an opening through the dielectric layer between the metal layer and the metal layer or between the metal ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L23/528
Inventor 陈林
Owner SEMICON MFG INT (SHANGHAI) CORP