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A system and method for lms error correction applied to high-speed adc

A technology of error correction and correction method, which is applied in the direction of analog/digital conversion calibration/test, code conversion, electrical components, etc., and can solve the problems of large data bits and difficult implementation

Active Publication Date: 2019-06-07
CHENGDU BOSIWEI TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Since the correction of the gain error of the operational amplifier often requires a precision of one thousandth, the step factor of the LMS algorithm is usually a very small value, such as at the level of 10^-12, and at least 41 bits of decimal are required to be signed. The form expresses this step size factor, so the bit width of the data is very large in the specific operation, and it is difficult to realize it in the high-speed circuit

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  • A system and method for lms error correction applied to high-speed adc
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  • A system and method for lms error correction applied to high-speed adc

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Embodiment Construction

[0034] The technical solution of the present invention will be further described in detail below in conjunction with the accompanying drawings, but the protection scope of the present invention is not limited to the following description.

[0035] Such as figure 1 As shown, the application block diagram of using the LMS algorithm to correct the gain of the ADC circuit op amp, by adding the known signal d[n] to the input of the ADC, and then performing a correlation operation on the output x[n] of the ADC with d[n], The opamp_gain value in the figure can be calculated, that is, the op amp gain.

[0036] Such as figure 2Shown, a kind of LMS error correction system applied to high-speed ADC, comprises series-to-parallel conversion circuit, parallel operation circuit and result generation circuit; The output terminal of described series-to-parallel conversion circuit is connected with parallel operation circuit, the output of result generation circuit The terminal is connected ...

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Abstract

The invention discloses an LMS (Least Mean Square) error correction system and method applied to a high-speed ADC (Analog to Digital Converter). The system comprises a serial-to-parallel conversion circuit, a parallel operation circuit and a result generating circuit, wherein an output end of the serial-to-parallel conversion circuit is connected with the parallel operation circuit; an output end of the parallel operation circuit is connected with the result generating circuit; the serial-to-parallel conversion circuit is used for performing serial-to-parallel conversion on an input signal of the ADC and an ADC sampling output signal to obtain a plurality of paths of input signals of the ADC and the ADC sampling output signals; the parallel operation circuit is used for performing a parallel operation on the signals obtained by serial-to-parallel conversion; and the result generating circuit is used for further processing the output of the parallel operation circuit and realizing output of an error correction signal. Through adoption of the LMS error correction system and method, conversion is performed through the serial-to-parallel conversion circuit firstly, and a calculated result obtained by the parallel operation circuit is input into the result generating circuit, so that data rates of all variables are lowered greatly, thereby preventing a part with a largest operation amount from becoming a bottleneck restricting the system implementation speed.

Description

technical field [0001] The invention relates to an LMS error correction system and method applied to a high-speed ADC. Background technique [0002] With the advancement of integrated circuit technology, digital adaptive correction technology (LMS for short) is widely used to solve various deviation problems in ADCs. The LMS algorithm is to continuously correct the initialized filter coefficients according to the minimum mean square error criterion. Realized, the LMS algorithm has a convergence time, which is controlled by the step size factor of the algorithm. Within a certain value range, increasing the step size factor will reduce the convergence time, but the tracking accuracy is low after stabilization, otherwise the adjustment time will be faster Longer, the tracking accuracy is higher after stabilization. [0003] Correcting the gain error of the operational amplifier in the ADC is a typical application of the LMS algorithm. Since the correction of the gain error of...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/10
CPCH03M1/1014
Inventor 辜波马骁
Owner CHENGDU BOSIWEI TECH CO LTD