A kind of semiconductor device and its manufacturing method, electronic device

Abstract

The invention provides a semiconductor device and a manufacturing method thereof and an electronic device. The method comprises the steps that a semiconductor substrate is provided, and pseudo gate structures are formed on the semiconductor substrate; an interlayer dielectric layer is formed on the semiconductor substrate so as to fill the gap between the pseudo gate structures; the pseudo gate structures are removed so that grooves are formed; first preprocessing is performed so as to improve the situation of the side wall and the bottom surface of the grooves; an interface layer is formed on the bottom part of the grooves and second preprocessing is performed so as to improve the surface characteristic of the interface layer; a high-k dielectric layer is formed on the side wall of the grooves and the top part of the interface layer; and a cover layer is formed on the high-k dielectric layer, wherein the step of performing third reprocessing is also included before formation of the cover layer so as to enhance the quality of the high-k dielectric layer, the step of performing fourth preprocessing is also included after formation of the cover layer and oxygen is driven into the high-k dielectric layer so as to reduce the defect of oxygen vacancy. According to the semiconductor device and the manufacturing method thereof and the electronic device, the quality of the formed interface layer and the high-k dielectric layer can be obviously improved so that the reliability of the device can be enhanced.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a semiconductor device, a manufacturing method thereof, and an electronic device. Background technique [0002] In the manufacturing process of next-generation integrated circuits, a high-k-metal gate process is usually used for the fabrication of complementary metal-oxide-semiconductor (CMOS) gates. For CMOS with a smaller numerical process node, the high-k-metal gate process is usually a gate-last process, and its implementation process is a high-k dielectric layer followed by a metal gate and a high-k dielectric layer followed by a There are two types of metal grids. The implementation process of the former includes: forming a dummy gate structure on a semiconductor substrate, and the dummy gate structure is composed of an interface layer, a high-k dielectric layer, a capping layer and a sacrificial gate material stacked from bottom to top. Layer composition; sidewall...

AI Technical Summary

Problems solved by technology

With the continuous shrinking of the feature size of semiconductor devices, when implementing the post-high-k dielectric layer metal gate process, it is necessary to sequentially deposit the interface after removing the sacrificial dielectric layer and the sacrificial gate material layer before filling the metal gate material. layer, high-k dielectric layer, capping layer, barrier layer, work function metal layer and wetting layer, the process window of

Images