Compression method and device based on cryptographic hash algorithm

A technology of hash algorithm and compression method, which is applied in the field of communication, can solve the problems of low circuit clock frequency and throughput, long circuit critical path, and large adder delay, etc., to reduce delay, shorten critical path, and improve throughput Effect

Active Publication Date: 2017-01-04
BEIJING SMARTCHIP SEMICON TECH CO LTD +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, this circuit structure causes the critical path of the circuit to be relatively long. In the current number of compression rounds, the critical

Method used

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  • Compression method and device based on cryptographic hash algorithm
  • Compression method and device based on cryptographic hash algorithm
  • Compression method and device based on cryptographic hash algorithm

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Experimental program
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Effect test

Embodiment 1

[0112] image 3 A flow chart of a cryptographic hash algorithm-based compression method provided in Embodiment 1 of the present invention, Figure 4 A schematic structural diagram of a compression circuit based on a cryptographic hash algorithm provided in Embodiment 1 of the present invention, as shown in image 3 , Figure 4 As shown, the method includes:

[0113] Step S1, obtain the initial value of each variable word, the initial value is the compression result of each variable word in the previous cycle or the initial value of each variable word, and the variable word includes: the first variable word, the second variable word, the second variable word The third variable word, the fourth variable word.

[0114] Specifically, variable words are stored in registers, the first variable word can correspond to E in the algorithm, the second variable word can correspond to F in the algorithm, the third variable word can correspond to G in the algorithm, and the fourth variab...

Embodiment 2

[0132] Figure 5 A flow chart of a cryptographic hash algorithm-based compression method provided in Embodiment 2 of the present invention, Figure 6 A schematic structural diagram of a compression circuit based on a cryptographic hash algorithm provided in Embodiment 2 of the present invention, in Figure 5 neutralize image 3 Steps with the same reference numbers are the same as image 3 The same text descriptions are applicable and will not be repeated here.

[0133] In this embodiment, the variable word may also include: a fifth variable word;

[0134] Step S4 may include:

[0135] Step S401, obtaining the initial value of the fifth variable word, and shifting the initial value of the fifth variable word by a preset number of digits;

[0136] The fifth variable word corresponds to the A variable word in the algorithm.

[0137] Step S402, performing three times the initial value of the shifted fifth variable word, the pre-calculated expansion word, the initial value o...

Embodiment 3

[0163] Figure 8 A schematic diagram showing the structure of the cryptographic hash algorithm-based compression device provided by Embodiment 3 of the present invention, as shown in Figure 8 As shown, the device 10 includes: an acquisition module 110 , a Boolean function processing module 120 , a compression and sum processing module 130 , a selection module 140 , and a replacement operation module 150 .

[0164] Acquisition module 110, is used for obtaining the initial value of each variable word, and described initial value is the compression result of each variable word of last period or the initial value of each variable word, and described variable word comprises: the first variable word, the second variable word word, the third variable word, the fourth variable word;

[0165] The acquiring module 110 is further configured to acquire a pre-calculated extension word, wherein the pre-calculated extension word is the sum of the extension word and the initial value of the...

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Abstract

The invention relates to a compression method and device based on a cryptographic hash algorithm. The method comprises: obtaining an initial value of each variable word and a precomputed extension word; carrying out Boolean function processing of the initial values of the first variable word, the second variable word and the third variable word; carrying out compressed summing processing of the precomputed extension word, the initial value of the first variable word, a compensation result and the result of the Boolean function processing, wherein the compensation result being the sum of a constant subjected to preset bit shift and a preset compensation value; performing selection on the result of the compressed summing processing; and carrying out displacement operation on the result of the selection to obtain the compression result of the first variable word of a current cycle. The method can shorten the key path of the algorithm, reduce the time delay of the key path, and increase the throughput of a circuit.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a compression method and device based on a cryptographic hash algorithm. Background technique [0002] With the development and wide application of information technology and computer technology, people's requirements for the credibility of information data are also getting higher and higher. In high-speed cryptographic chips, cryptographic hash algorithm (Cryptographic Hash Algorithm, abbreviation: SM3) cryptographic hash algorithm has been more and more used in digital signature and verification, message authentication code generation and verification, and random number generation in commercial cryptographic applications. generate. [0003] The SM3 cryptographic hash algorithm is a domestic cryptographic algorithm announced by the State Cryptography Administration in December 2010. The SM3 cryptographic hash algorithm is suitable for digital signature and authentication...

Claims

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Application Information

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IPC IPC(8): H04L9/06
CPCH04L9/0643H04L2209/125
Inventor 臧仕平胡晓波邵瑾赵东艳甘杰李娜
Owner BEIJING SMARTCHIP SEMICON TECH CO LTD
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