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A goa drive circuit

A technology for driving circuits and circuits, applied to static indicators, instruments, etc., can solve the problems of large load and power consumption of clock signals, difficulty in reducing power consumption of GOA circuits, and insufficient optimization of clock control signals, etc., to achieve Effect of Power Consumption Reduction

Active Publication Date: 2020-09-04
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The existing traditional CMOS GOA circuit design is quite satisfactory, and the use of the clock control signal has not been optimized too much, resulting in a large load and power consumption for generating the clock signal, making it difficult to reduce the power consumption of the entire GOA circuit

Method used

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Embodiment Construction

[0068] The implementation of the present invention will be described in detail below in conjunction with the accompanying drawings and examples, so as to fully understand and implement the process of how to apply technical means to solve technical problems and achieve technical effects in the present invention. It should be noted that, as long as there is no conflict, each embodiment and each feature in each embodiment of the present invention can be combined with each other, and the formed technical solutions are all within the protection scope of the present invention.

[0069] Such as figure 1 Shown is a traditional CMOS GOA driving circuit in the prior art, the circuit adopts an interleaved driving method, and the unilateral GOA driving circuit needs two clock control signal CK wirings (such as clock control signal CK1 wiring, clock control signal CK2 wiring), a startup signal STV wiring (not shown), a reset signal RESET wiring, a high potential signal VGH wiring and a low...

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Abstract

The invention discloses a GOA drive circuit. The GOA drive circuit comprises an input control module which is used for inputting a level drive signal, a latching module which is used for latching the input level drive signal, a processing module which is used for processing the level drive signal output by the latching module into a first intermediate signal, and a buffer module which is used for buffering and processing the first intermediate signal into a gate drive signal and a second intermediate signal. The phases of the first intermediate signal and the second intermediate signal are opposite. The first intermediate signal and / or the second intermediate signal output by an upper level GOA drive circuit and a lower level GOA drive circuit control the input control module to input the level drive signal, and control the latching module to latch the level drive signal input by the input control module. According to the invention, the input control module is not controlled by a clock control signal, which effectively reduces the load for generating the clock control signal and the power consumption of the circuit.

Description

technical field [0001] The invention belongs to the technical field of display control, and in particular relates to a GOA driving circuit. Background technique [0002] GOA (Gate Driver On Array, line scan integrated on the array substrate) is a technology that utilizes the existing thin film transistor liquid crystal display array process to fabricate the line scan drive signal circuit on the array substrate to realize progressive scan drive. [0003] The existing traditional CMOS GOA circuit design is quite satisfactory, and the use of the clock control signal has not been optimized too much, resulting in a large load and power consumption for generating the clock signal, making it difficult to reduce the power consumption of the entire GOA circuit . Contents of the invention [0004] The invention provides a GOA drive circuit, which does not use a clock control signal to control the input control module, and can effectively reduce the load for generating the clock con...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G09G3/36
CPCG09G3/3611
Inventor 赵莽
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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