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Decoding method and decoder for low density parity check code

A low-density parity and decoder technology, which is applied in the field of decoding methods and decoders of low-density parity-check codes, can solve problems such as inability to meet flow requirements, low processing performance, and difficult timing, and achieve decoding Better balance of performance and resources, increased processing performance, reduced resources and computationally complex effects

Active Publication Date: 2020-04-28
HUAWEI TECH CO LTD
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Problems solved by technology

For example, for long codes, the processing performance is high, but many resources are used, and the timing is difficult; for short codes, the degree of parallelism is low, the processing performance is low, and the flow requirements cannot be met.

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  • Decoding method and decoder for low density parity check code
  • Decoding method and decoder for low density parity check code
  • Decoding method and decoder for low density parity check code

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Embodiment Construction

[0065] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0066] LDPC decoding can be divided into two categories: hard decision decoding and soft decision decoding. The processing object of hard-decision decoding is binary data, the amount of calculation data is small, but the decoding performance is very limited; the processing object of soft-decision decoding is LLR value, the amount of calculation data is much larger, but it has good decoding performance , in practical applications, soft-decision decoding...

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Abstract

The embodiment of the present invention provides a decoding method and a decoder of an LDPC code, the method comprising: the decoder divides an LDPC code C having a length of n into k LDPC codes D={D 1 ,D 2 ,...,D k‑1 ,D k}; the decoder will D i ,i=1,2,...,k‑1, k are arranged in columns to obtain the transposed code of LDPC code D According to the value of the corresponding element in the target parity check matrix, k is cyclically shifted by row to obtain the shift Code E={E 1 ,E 2 ,...,E t‑1 ,E t}, where t is equal to the number of rows of the target parity check matrix; the decoder obtains t*m groups of LDPC subcodes F according to the shift code E and the length d of the decoder 1 , F 2 ,...,F tm‑1 , F tm , where E j are divided into m groups, and the decoder decodes m groups of LDPC subcodes to obtain the decoding result of LDPC code C. In this way, the decoding parallelism of the LDPC code can be flexibly controlled, and a better balance between decoding performance and resources can be achieved.

Description

technical field [0001] Embodiments of the present invention relate to the field of encoding and decoding, and more specifically, relate to a decoding method and a decoder of a Low Density Parity Check Code (LDPC). Background technique [0002] Low-density parity-check codes are block error-correcting codes with a sparse parity check matrix, which are suitable for almost all channels. Since the performance of LDPC codes approaches the Shannon limit, it has the characteristics of simple description and implementation, easy theoretical analysis and research, simple decoding and parallel operation, suitable for hardware implementation, etc., it has become a research hotspot in the field of communication in recent years. [0003] LDPC codes have multiple code lengths. For example, DOCSIS 3.1 protocol specifies three code lengths, wherein the long code length L=360, the medium code length L=180, and the short code length L=56. Generally speaking, a decoder must support multiple c...

Claims

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Application Information

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IPC IPC(8): H04L1/00H03M13/11
CPCH04L1/00H03M13/1117H03M13/1137H03M13/116H03M13/6508H03M13/112
Inventor 范嘉旗司小书
Owner HUAWEI TECH CO LTD
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