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A processing technology of silicon wafer with abnormal diffusion square resistance

A technology for processing technology and silicon wafers, applied in sustainable manufacturing/processing, climate sustainability, semiconductor devices, etc., can solve the problems of high failure rate of supplementary expansion and small change in square resistance, etc., to reduce barriers and ensure PN Junction depth, the effect of ensuring battery quality and efficiency

Active Publication Date: 2020-08-07
平煤隆基新能源科技有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to overcome the problem that P atoms cannot pass through the PSG (phosphosilicate glass layer) smoothly due to the existing layer of PSG (phosphosilicate glass layer) on the surface of the silicon wafer during the supplementary expansion of silicon wafers with abnormal diffusion square resistance. As a result, the square resistance changes little and the failure rate of supplementary expansion is high, and a treatment process for silicon wafers with abnormal diffusion square resistance is provided. This treatment process can remove the PSG (phosphosilicate glass layer) on the surface of the silicon wafer, making it easier for P atoms to Doping into the surface of the silicon wafer, reducing the diffusion resistance to the specified range by supplementing the concentration of P atoms, while ensuring the depth of the PN junction

Method used

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  • A processing technology of silicon wafer with abnormal diffusion square resistance
  • A processing technology of silicon wafer with abnormal diffusion square resistance
  • A processing technology of silicon wafer with abnormal diffusion square resistance

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Embodiment 1

[0022] Embodiment 1: A treatment process for a silicon wafer with abnormal diffusion square resistance, comprising the following steps:

[0023] Step 1: Screen single-crystal silicon wafers with diffusion resistance ≥ 110Ω;

[0024] Step 2: Import the monocrystalline silicon wafer in step 1 into the silicon wafer flower basket, configure HF solution with a concentration of 5%, pickle the monocrystalline silicon wafer for 5 minutes, and remove the phosphosilicate glass layer on the surface of the monocrystalline silicon wafer;

[0025] Step 3: After pickling, import the monocrystalline silicon wafer in step 2 into the quartz boat through the automatic rewinding machine, and carry out the diffusion in the furnace. The diffusion in the furnace is carried out in sequence according to the four steps of deposition-advance-re-deposition-re-advance:

[0026] Deposition: Raise the temperature of the diffusion furnace to 500°C, feed nitrogen, oxygen and phosphorus oxychloride gas, where...

Embodiment 2

[0032] Embodiment 2: A treatment process for a silicon wafer with abnormal diffusion square resistance, comprising the following steps:

[0033] Step 1: Screen single-crystal silicon wafers with diffusion resistance ≥ 110Ω;

[0034] Step 2: Import the monocrystalline silicon wafer in step 1 into the silicon wafer flower basket, configure a HF solution with a concentration of 20%, pickle the monocrystalline silicon wafer for 15 minutes, and remove the phosphosilicate glass layer on the surface of the monocrystalline silicon wafer;

[0035] Step 3: After pickling, import the monocrystalline silicon wafer in step 2 into the quartz boat through the automatic rewinding machine, and carry out the diffusion in the furnace. The diffusion in the furnace is carried out in sequence according to the four steps of deposition-advance-re-deposition-re-advance:

[0036] Deposition: Raise the temperature of the diffusion furnace to 900°C, and feed nitrogen, oxygen and phosphorus oxychloride ga...

Embodiment 3

[0042] Embodiment 3: A treatment process for a silicon wafer with abnormal diffusion square resistance, comprising the following steps:

[0043] Step 1: Screen single-crystal silicon wafers with diffusion resistance ≥ 110Ω;

[0044] Step 2: Import the monocrystalline silicon wafer in step 1 into the silicon wafer flower basket, configure a HF solution with a concentration of 15%, pickle the monocrystalline silicon wafer for 10 minutes, and remove the phosphosilicate glass layer on the surface of the monocrystalline silicon wafer;

[0045] Step 3: After pickling, import the monocrystalline silicon wafer in step 2 into the quartz boat through the automatic rewinding machine, and carry out the diffusion in the furnace. The diffusion in the furnace is carried out in sequence according to the four steps of deposition-advance-re-deposition-re-advance:

[0046] Deposition: Raise the temperature of the diffusion furnace to 700°C, feed nitrogen, oxygen and phosphorus oxychloride gas, w...

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Abstract

The invention relates to the manufacturing field of a silicon solar battery, and particularly relates to a treatment process for a silicon wafer with abnormal diffusion sheet resistance. The treatmentprocess comprises the following steps of 1, screening monocrystal silicon wafers with sheet resistance greater than or equal to 110-<omega> after diffusion; 2, preparing an HF solution with concentration of 5-20% to remove a phosphorosilicate glass layer from the surface, and performing acid washing on the monocrystal silicon wafers for 5-15min; and 3, after acid washing, leading the monocrystalsilicon wafers obtained in the step 2 into a quartz boat by an automatic rewinder, and performing melting down and diffusion by four steps of deposition, pushing in, re-deposition, and re-pushing-in in sequence. By virtue of the treatment process for the silicon wafer with abnormal diffusion sheet resistance, the diffusion supplementation successful rate is greatly improved.

Description

technical field [0001] The invention relates to the field of manufacturing silicon solar cells, in particular to a treatment process for a silicon wafer with abnormal diffusion square resistance. Background technique [0002] In the production of solar cells, due to factors such as equipment failure and unstable exhaust outside the power source, the diffusion resistance of the film is too large and exceeds the upper limit of the specification line. The current conventional technical solution is to directly perform supplementary expansion without any surface treatment; but When performing supplementary expansion directly, because there is already a layer of PSG (phosphosilicate glass layer) on the surface of the silicon wafer, P atoms cannot pass through the PSG (phosphosilicate glass layer) smoothly, resulting in little change in square resistance and a high failure rate of supplementary expansion; Some supplementary expansion schemes use the same temperature supplementary e...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/223H01L21/311H01L31/18
CPCY02P70/50
Inventor 郭飞彭平夏中高顾鹏
Owner 平煤隆基新能源科技有限公司