SPI bus hardware triggering and decoding method based on oscilloscope

A technology of SPI bus and decoding method, which is applied in the direction of instruments, digital variable display, electrical digital data processing, etc. It can solve the problems of slow software decoding speed and many software and hardware interactions, achieve fast and accurate triggering and decoding, and reduce waiting time , Improve the effect of long decoding time

Inactive Publication Date: 2018-01-16
THE 41ST INST OF CHINA ELECTRONICS TECH GRP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

There are many software and hardware interactions in the whol

Method used

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  • SPI bus hardware triggering and decoding method based on oscilloscope
  • SPI bus hardware triggering and decoding method based on oscilloscope
  • SPI bus hardware triggering and decoding method based on oscilloscope

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[0025] Example 1

[0026] The invention is based on the oscilloscope platform to realize the structure of SPI bus triggering and decoding through hardware as image 3 As shown, the triggering and decoding process mainly includes 6 parts. The synchronization control module is connected to and communicates with the command analysis and parameter setting module, the signal input module, the bus decoding module, the real-time storage module and the display module respectively.

[0027] 1. Command analysis and parameter setting module

[0028] The input channel selection, channel threshold, channel polarity, bit sequence, bus display setting, bus trigger type, bus trigger mode, trigger data length and trigger data are sent to the synchronization control module, and the synchronization control module will perform a The decoding process is controlled.

[0029] 2. Signal input processing module

[0030] The SPI bus has four main channels: SCL (clock signal money), SS (chip select signal line)...

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Abstract

The invention provides a SPI bus hardware triggering and decoding method based on an oscilloscope. In SPI bus hardware decoding, triggering and decoding are both internally accomplished by a FPGA, anda FPGA decoding module obtains tag content and tag position information which can be directly supplied to software for display at each time point and stores the tag content and the tag position information in the FPGA or an external memory (during a great storage depth) in real time. By employing the above scheme, the waiting time of the oscilloscope can be reduced, triggering and decoding can berapidly and accurately realized, defects of long time consumption and poor timeliness of conventional software decoding of the SPI bus are overcome, and the decoding efficiency of the SPI bus in theoscilloscope is improved.

Description

technical field [0001] The invention belongs to the technical field of SPI bus hardware control, and in particular relates to an oscilloscope-based SPI bus hardware triggering and decoding method. Background technique [0002] SPI is a serial peripheral interface bus standard, which is a high-speed, full-duplex, synchronous communication bus. Originally developed by Motorola for its 68000 series of microcontrollers in the 1980s, it is now widely used in various devices in embedded system design. SPI is mainly used between microcontrollers and direct peripherals. It is widely used in mobile devices such as mobile phones, and communication between computer memory chips and keyboard displays. Digital oscilloscope is currently the most widely used tool in the electronics industry, and is widely used in scientific research, production, testing and technical support testing of electronic equipment. With the development of electronic technology, bus analysis functions are integra...

Claims

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Application Information

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IPC IPC(8): G01R13/02G06F13/42
Inventor 姜正吉刘洪庆刘永
Owner THE 41ST INST OF CHINA ELECTRONICS TECH GRP
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