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Pixel circuit, driving method thereof, display panel and display device

A technology of a pixel circuit and a driving method, applied in the display field, can solve problems such as afterimage of a display panel, and achieve the effect of solving the problem of afterimage

Active Publication Date: 2019-11-19
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Existing pixel circuits are prone to afterimage problems on the display panel, such as Figure 1a As shown, when there are both high gray scale and low gray scale in the displayed picture, and after a period of continuous display, switch to Figure 1b In the gray-scale picture of the same gray scale shown, due to the hysteresis effect of the driving transistor of the pixel circuit, the I-V curves of the gate-source voltage Vgs of the driving transistor for forward scanning and reverse scanning do not overlap

Method used

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  • Pixel circuit, driving method thereof, display panel and display device

Examples

Experimental program
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Effect test

example 1

[0108] by Figure 4 Take the pixel circuit shown as an example, an input and output timing corresponding to the pixel circuit is as follows Figure 10a shown. Specifically, select Figure 10a The three stages P1, P2 and P3 in the input timing diagram are shown.

[0109] In the phase P1 (that is, the first reset phase), Scan1=0, Scan2=1, Scan3=0, Emit1=0, Emit2=1. The first switching transistor T1 is turned on to reset the gate of the driving transistor DT, and the potential of the first node N1 is Vint1. The fourth switching transistor T4 is turned on to reset the first pole of the driving transistor DT, and the potential of the second node N2 is VDD. The sixth switch transistor T6 is turned on to reset the anode of the light emitting diode oled, and the potential of the third node N3 is Vint2. The second switch transistor T2, the third switch transistor T3 and the fifth switch transistor T5 are turned off, and the light emitting diode oled does not emit light.

[0110] ...

example 2

[0116] Specifically, due to the signal delay, in order to avoid writing the data signal to the second node N2 before the fourth switching transistor T4 is turned off, the first reset phase and the data writing phase may also include a second reset phase, Figure 4 An input and output timing corresponding to the pixel circuit shown is as follows Figure 10b shown. Specifically, select Figure 10a The four stages P1, P1', P2 and P3 in the input timing diagram shown.

[0117] The working process of the P1, P2 and P3 phases is the same as that of the P1, P2 and P3 phases in Example 1, and will not be repeated here. The P1' stage, that is, the second reset stage, will be described in detail below.

[0118] In the phase P1' (that is, the second reset phase), Scan1=0, Scan2=1, Scan3=0, Emit1=1, Emit2=1. The first switching transistor T1 is turned on to reset the gate of the driving transistor DT, and the potential of the first node N1 is Vint1. The sixth switch transistor T6 is ...

example 3

[0120] Specifically, in order to reduce signal terminals, the third scanning signal terminal and the first scanning signal terminal may be the same signal terminal. by Figure 5 Take the pixel circuit shown as an example, an input and output timing corresponding to the pixel circuit is as follows Figure 10c shown. Specifically, select Figure 10c The four stages P1, P1', P2 and P3 in the input timing diagram shown.

[0121] Specifically, compared with the second example, except the sixth switching transistor T6, the working states of other transistors are the same as those of the second example. In the second example, the sixth switch transistor T6 is turned on in the three stages of P1, P1' and P2, but in this example the sixth switch transistor T6 is turned on only in the stages of P1 and P1'.

[0122] Although the present example can reduce the number of signal terminals compared with the example 2, the example 2 can make the reset potential of the third node N3 last u...

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Abstract

The invention discloses a pixel circuit, a driving method thereof, a display panel and a display device. The pixel circuit uses a node reset module to reset the gate of a driving transistor in the first reset stage, and uses a data writing module to realize the reset in the data writing stage. The writing of data signals and the compensation for the threshold voltage drift of the driving transistor use the light-emitting control module to conduct the first voltage terminal and the light-emitting diode during the light-emitting phase, so as to realize the improvement of the driving transistor threshold caused by process and transistor aging through internal compensation Display unevenness caused by voltage drift. Moreover, since the light emission control module uses the first voltage terminal to reset the first pole of the driving transistor in the first reset stage, the reset module resets the gate of the driving transistor in the first reset stage, thereby ensuring that the gate-source voltage of the driving transistor is A constant value, not affected by the last signal / picture, so as to solve the afterimage problem.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a pixel circuit, a driving method thereof, a display panel and a display device. Background technique [0002] Organic Light Emitting Diode (OLED) display is one of the hotspots in the field of flat panel display research today. Compared with liquid crystal display, OLED display has the advantages of low energy consumption, low production cost, self-illumination, wide viewing angle and fast response speed. Currently, OLED displays have begun to replace traditional Liquid Crystal Displays (LCDs) in the fields of flat panel displays such as mobile phones, PDAs, and digital cameras. Among them, pixel circuit design is the core technical content of OLED display, which has important research significance. [0003] Existing pixel circuits are prone to afterimage problems on the display panel, such as Figure 1a As shown, when there are both high gray scale and low gray scale in the d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G09G3/3258
CPCG09G3/3233G09G2300/0861G09G2310/0251G09G2310/0262G09G2300/0819G09G3/3241G09G2320/0257G09G2300/043G09G2300/0426G09G2320/0233
Inventor 彭宽军邹祥祥羊振中
Owner BOE TECH GRP CO LTD
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