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4results about How to "Improve display unevenness" patented technology

Q: How to Improve display unevenness?

Display panel, driving method thereof and display device,Display device,Compensation method and compensation device for tiled display panel,Display panel and compensation data determination method, device and driving method thereof

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Display panel, driving method thereof and display device

PendingCN122090762Aavoid uneven displayImprove display unevennessStatic indicating devicesDisplay deviceData signal

The invention discloses a display panel, a driving method thereof and a display device. The display panel includes: a plurality of sub-pixels; the data lines are electrically connected with the sub-pixels; each demultiplexer comprises n transistors, first electrodes of the n transistors in the same demultiplexer are electrically connected with the same data signal end, second electrodes of the n transistors in the same demultiplexer are electrically connected with the n data lines in a one-to-one correspondence mode, and n is an integer larger than 1; in the first time period, the conduction sequence of the n transistors in the same demultiplexer is a first sequence, in the second time period, the conduction sequence of the n transistors in the same demultiplexer is a second sequence, and the first sequence is different from the second sequence. The embodiment of the invention provides a display panel, a driving method thereof and a display device. The problem of uneven display of the display panel can be solved.

Display panel, driving method thereof and display device

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Owner:XIAMEN TIANMA DISPLAY TECH CO LTD

Display device

ActiveCN120833735BRealize chargingMinimize charging variance

This invention provides a display device in which two cascaded gate driving circuits are spaced X gate driving circuits apart. The phase difference of the first clock signals corresponding to the two cascaded gate driving circuits is (X+1)H. In at least one sub-pixel, the effective level of the first gate control signal corresponding to the compensation transistor and the effective level of the second gate control signal corresponding to the data transistor at least partially overlap. The effective level of the second gate control signal corresponding to the data transistor is located between the two first effective levels of the first clock signal applied by the gate driving circuit corresponding to the compensation transistor, and the phase difference between the effective level of the second gate control signal corresponding to the data transistor and one of the two first effective levels is greater than 0 and less than (X+1)H. This ensures that in the same sub-pixel, the effective level of the second gate control signal corresponding to the data transistor does not coincide with the moment when the voltage drop of the first gate control signal corresponding to the compensation transistor occurs, thereby improving the problem of uneven display.