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Design of aligning layout used for GPP chip photoetching process

A lithography process and layout technology, which is applied in the design field of alignment layout for GPP chip lithography process, can solve the problems of difficult alignment of double sheets, practical inconvenience, and different reflection effects.

Inactive Publication Date: 2018-03-02
HUANGSHAN GUIDING ELECTRONICS
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this kind of layout design is too simple, which is very inconvenient in practice, and even makes it difficult to align the two chips.
The problem is that the photolithographic chromium plate is formed by coating a layer of metal chromium film on the optical flat glass, and the reflection effect of the chromium film on the front and back sides is different.

Method used

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  • Design of aligning layout used for GPP chip photoetching process
  • Design of aligning layout used for GPP chip photoetching process
  • Design of aligning layout used for GPP chip photoetching process

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Embodiment Construction

[0023] The first is the layout design of the lithography plate, as long as the size range provided by the present invention, and then according to the accuracy requirements of the product and the lithography machine, the layout size of each part can be determined, and the upper, lower, and overlay lithography plates are set respectively. Align the pattern and produce the corresponding lithography.

[0024] The second is to load the selected lithography plate into the lithography machine. If it is a double-sided lithography process, firstly, align the alignment marks on the upper and lower lithography plates. Using the large circle pattern of this design layout, observe the The upper and lower circles in the mirror are drawn closer, and then the rough adjustment is started. During the rough adjustment, the two alignment circles on the lithography plate should be observed at the same time, not only the overlap of the horizontal position X and the vertical position Y, but also the...

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Abstract

The invention provides an alignment layout for the lithography process of a GPP rectifier chip, which improves the traditional simple cross-line graphic scheme into an alignment scheme with three alignment areas, which is not only beneficial to find alignment marks for rough adjustment, but also beneficial for fine alignment. Adjusting and aligning the graphics not only improves the efficiency but also improves the quality of the product without increasing any manufacturing costs.

Description

technical field [0001] The lithography process is used to manufacture the power semiconductor device chips of GPP chips, which belongs to the category of "electronic information-new electronic components" in the "high-tech fields supported by the state in 2016". Background technique [0002] The photolithography process is a traditional process that has been used in the mass production of power semiconductor devices for the manufacture of GPP (Glass Passivation Protection) chips. A chrome-plated glass plate is used to manufacture a photoresist with a pattern, and the photoresist is covered on a silicon wafer coated with a negative (or positive) photoresist, and the system is irradiated and exposed for a certain period of time with near-ultraviolet light. Where there is a chrome film, the light is blocked, and the corresponding photoresist under the photolithography plate does not have an optical reaction, and it is easy to dissolve in the developer afterwards. Will not diss...

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Application Information

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IPC IPC(8): G03F9/00
CPCG03F9/7076G03F9/7003G03F9/7088
Inventor 程德明胡建业胡志坚胡翰林汪华锋
Owner HUANGSHAN GUIDING ELECTRONICS