A method for measuring the self-heating effect of transistors and the average temperature change of the channel

Abstract

The invention discloses a method for measuring a self-heating effect and an average channel temperature change of a transistor. The method comprises: heat saturation time of heat generation of a self-heating effect and heat-dissipating time of complete dissipation of heat after turning off are determined; and a change of an average channel temperature with time at the moment of starting of a transistor is extracted and a three-dimensional characteristic relationship between the average channel temperature, a drain voltage, and a drain current of the transistor is depicted to extract a thermalcapacity and a thermal resistor that change transiently with time, so that an accurate SPICE model meeting the actual circuit situation. The method is suitable for a high-performance planar transistorusing silicon, germanium, and III-V-cluster compounds as carrier channels and field-effect transistors with fin type three-dimensional grid and grid-enclosed structures. According to the method disclosed by the invention, the electrical characteristics of the transistor are directly measured and the influence on the drain current by the self-heating effect is represented quantitatively; and thusthe accurate SPICE model relates to the self-heating effect is established.

Description

Technical field [0001] The invention belongs to the field of electrical characteristics testing and reliability characterization of metal semiconductor oxide field effect transistors, and particularly relates to a method for measuring the self-heating effect of the transistor and the average channel temperature change by using electrical characteristics in a very short time (1nS). Background technique [0002] Reducing device size and increasing integration density have always been driving forces for the development of integrated circuits. With the continuous development of semiconductor process technology, the feature size of integrated circuits has shrunk from the initial ten micrometers to sub-micrometers or even ten nanometers. As the feature size shrinks to the nanometer scale, the thickness of the gate dielectric gradually decreases to close to 1nm, resulting in an increase in the off-state gate leakage current, an increase in power consumption density, and mobility degrada...

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Problems solved by technology

For SOI devices, the thermal conductivity of the buried oxide layer is two orders of magnitude lower than that of silicon materials, so it is difficult to dissipate the heat generated during operation; for FinFET devices, its special three-dimensional structure also makes it work The heat generated by the device is difficult to dissipate, so both devices with new structures suffer from self-heating effect

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