Analysis method for n electrode pattern of efficient vertical-structure LED chip
A LED chip, vertical structure technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., to achieve the effect of simple method, reduced sample quantity, and strong applicability
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Embodiment 1
[0046] A method for analyzing the n-electrode pattern of an efficient vertical structure LED chip, comprising the following steps:
[0047] (1) Construct the substrate of the LED chip model: use the modeling function of Tracepro software to construct the Si substrate, the substrate size is 120um×80um×120um, and it is in the shape of a cuboid; the height is 80um;
[0048] (2) Construct the p-electrode layer of the vertical structure LED chip model: use the 3D modeling function of Tracepro software to sequentially construct the bonding layer, the p-electrode protective layer, and the mirror on the silicon substrate (the surface with the same length and width): bonding The size of the layer is 120um×5um×120um, the size of the protective layer of the p electrode plate is 120um×10um×120um, and the size of the mirror is 120um×300nm×120um; each size refers to length×height×width;
[0049] (3) Construct the epitaxial layer of the vertical structure LED chip model: use the Tracepro sof...
Embodiment 2
[0064] A method for analyzing the n-electrode pattern of an efficient vertical structure LED chip, comprising the following steps:
[0065] (1) Construct the substrate of the LED chip model: use the modeling function of Tracepro software to construct the Si substrate, the substrate size is 120um×80um×120um, and it is in the shape of a cuboid; the height is 80um;
[0066] (2) Construct the p-electrode layer of the vertical structure LED chip model: use the 3D modeling function of Tracepro software to sequentially construct the bonding layer, the p-electrode protective layer, and the mirror on the silicon substrate (the surface with the same length and width): bonding The size of the layer is 120um×5um×120um, the size of the protective layer of the p electrode plate is 120um×10um×120um, and the size of the mirror is 120um×300nm×120um; each size refers to length×height×width;
[0067] (3) Construct the epitaxial layer of the vertical structure LED chip model: use the Tracepro sof...
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