Network structure and stack assembly

Abstract

A circuit structure and a stack assembly are disclosed. The circuit structure includes: a first line portion having a first electrical contact pad and a first forked conducting wire, a second line portion having a second electrical contact pad and a second forked conducting wire, and a third line portion having a plurality of third electrical contact pads, wherein the first and second forked conducting wires are arranged in a staggered manner and separated from each other, and one third electrical contact pad is connected to the first electrical contact pad, the first electrical contact pad isshared to achieve the effects of detecting circuit leakage and disconnection of the test circuit. At the same time, the number of electrical contact pads is reduced, layout space is reduced and miniaturization can be facilitated..

Description

technical field [0001] The invention relates to a detection of packaging process, especially a circuit structure for circuit detection. Background technique [0002] Generally, during the chip packaging process, a circuit test is usually performed on the chip and / or the substrate carrying the chip to know whether the electrical properties of the chip or the substrate are good. [0003] Currently, for chip circuit layout, substrate circuit layout, or when performing a redistribution layer (Redistribution Layer, RDL for short), two additional circuits are arranged, one of which is a leakage circuit used to detect whether there is leakage in the circuit , and the other is a Kelvin bridge (Kelvin Structure) used to detect whether there is an open circuit when the lines are connected in series. [0004] Such as Figure 1A As shown, the circuit structure 1a of the existing leakage circuit includes a first circuit part 11 having a first electrical contact pad 110 and a first fork-...

AI Technical Summary

Problems solved by technology

If there is an open circuit state, it means that the third electrical contact pads 130 cannot be electrically connected, that is, the circuit is poorly made.

[0008] However, it is necessary to reserve space for laying out the above two circuit structures 1a, 1b during testing, which is not conducive to meeting the miniaturization requirements of semiconductor packages.

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