CMOS (complementary metal oxide semiconductor) LDO (low-dropout regulator) and system for improving load response characteristics thereof

Abstract

The invention discloses a CMOS LOS and a system for improving load response characteristics thereof. The system comprises a control module and an extra tail current generating module; the input end ofthe control module is connected with the forward phase input end and the reverse phase input end of a CMOS error amplifier of the CMOS LDO for generating control signals to the extra tail current generating module when the difference between the forward phase input end and the reverse phase input end is not zero; the extra tail current generating module is used for generating extra tail current at the common end of input pair tubes after receiving the control signals to reduce the output overshoot of the CMOS LDO, and after the control signals disappear, the extra tail current can be reducedto zero. The system for improving the load response characteristics of the CMOS LDO achieves low static working current of the CMOS LDO and meanwhile reduces the output overshoot by adding the dynamicextra tail current, thereby reducing the power consumption of the CMOS LDO and improving the safety performance of the CMOS LDO.

Description

technical field [0001] The invention relates to the technical field of voltage regulators, in particular to a CMOS LDO and a system for improving its load response characteristics. Background technique [0002] A large number of LDOs (low dropout regulators, low-dropout linear regulators) are used in modern electronic equipment, especially CMOS LDOs with low quiescent operating current are more widely used. In order to prolong the standby and working time of the system where the CMOS LDO is located, it is urgent to reduce the quiescent operating current of the CMOS LDO, but the CMOS LDO with low quiescent operating current (especially less than 1uA) has the problem of poor load response characteristics. [0003] Specifically, please refer to figure 1 , figure 1 It is a schematic diagram of the structure of the existing CMOS LDO, the CMOS LDO adopts a differential input CMOS error amplifier, the non-inverting input terminal is connected to the reference voltage source VREF,...

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Problems solved by technology

But the problem is that the output overshoot caused by the rapid change of the CMOS LDO output load current is inversely proportional to the square root of the tail current, the smaller the tail current, the larger the overshoot, which reduces the safety performance of the LDO

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