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Single-grain reinforced clock control circuit in programmable configuration logic block and control method thereof

A single-event reinforcement and configuration logic technology, which is applied to logic circuits with logic functions, etc., can solve problems such as user storage data errors, limited anti-single event flipping ability of programmable features, and user function interruption.

Active Publication Date: 2018-05-11
BEIJING MXTRONICS CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the influence of the space single event effect, the data in the programmable user register will undergo a single event flip, resulting in an error in the user's stored data. If a single event flip occurs, the user function will be interrupted
The clock control circuit in the traditional programmable configuration logic block controls clock decoding and shifting operations by generating pulses to repeatedly read and write memory cells, which has flexible programmable characteristics and anti-single event flipping capabilities for programmable logic devices limited

Method used

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  • Single-grain reinforced clock control circuit in programmable configuration logic block and control method thereof
  • Single-grain reinforced clock control circuit in programmable configuration logic block and control method thereof
  • Single-grain reinforced clock control circuit in programmable configuration logic block and control method thereof

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Embodiment Construction

[0045] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0046] A single-particle reinforced clock control circuit and control method in a programmable configuration logic block of the present invention abandons the traditional clock control circuit, adopts timing and LAT structures to realize the latching and decoding of row, column and data signals, and realizes Synchronize the enable signal with the clock signal to generate a shifted overlapping clock to control the shifting of data; on this basis, the reinforced SRAM and the reinforced RS flip-flop design are used to realize the anti-single event hardening function of the user register, which improves the clock control circuit The ability to resist single instance flipping. The single event reinforcement index in the single event hardened clock control circuit of the present invention is 3 orders of magnitude higher than that of the tra...

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Abstract

The invention relates to a single-grain reinforced clock control circuit in a programmable configuration logic block and a control method thereof. The traditional clock control circuit is abandoned; on the basis of the time sequence and the LAT structure, latching and decoding of row, column, and data signals are realized; and an enabling signal and a clock signal are synchronized to generate a shifted overlapped clock, thereby controlling data displacement. With a reinforced SRAM and reinforced RS trigger designs, the anti-single-grain reinforcement function of the user register is realized,so that the anti-single-grain overturning capability of the clock control circuit is enhanced. According to the single-grain reinforced clock control circuit provided by the invention, the single-grain reinforcement index is improved by three magnitude orders by being compared with the traditional register, so that the high flexibility, good time sequence performance, and high anti-single-grain reinforcement index are realized during programmable user register usage by the user.

Description

technical field [0001] The present invention relates to a single-instance reinforced clock control circuit and control method in a programmable configuration logic block, in particular to a clock control circuit and control method in a programmable configuration logic block optimized for the application requirements of programmable logic devices. The method belongs to the field of integrated circuits. Background technique [0002] Programmable logic devices have the advantages of high flexibility, low cost, and short cycle time. They can greatly shorten the product development cycle and minimize risks. They have become core components in the integrated circuit industry. Among them, the clock control read-write circuit in the programmable configuration logic block is the core circuit in the programmable logic device to realize the user's logic function, and can be programmed to realize various sequential functions according to the user's needs. Due to the influence of the sp...

Claims

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Application Information

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IPC IPC(8): H03K19/20
CPCH03K19/20
Inventor 陈雷郭琨文治平倪劼孙华波王文锋孙健爽钱涛涛刘亚泽
Owner BEIJING MXTRONICS CORP
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