Single event hardened clock control circuit and control method in a programmable configuration logic block
A single-event reinforcement and configuration logic technology, applied in the direction of logic circuits with logic functions, etc., can solve the problems of limited programmable anti-single-event overturn capability, user function interruption, user storage data errors and other problems, to improve the anti-single event. The effect of flipping ability, meeting timing requirements, and reducing the probability of decoding errors
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[0045] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0046] A single-particle reinforced clock control circuit and control method in a programmable configuration logic block of the present invention abandons the traditional clock control circuit, adopts timing and LAT structures to realize the latching and decoding of row, column and data signals, and realizes Synchronize the enable signal with the clock signal to generate a shifted overlapping clock to control the shifting of data; on this basis, the reinforced SRAM and the reinforced RS flip-flop design are used to realize the anti-single event hardening function of the user register, which improves the clock control circuit ability to resist single-event upsets. The single event reinforcement index in the single event hardened clock control circuit of the present invention is 3 orders of magnitude higher than that of the traditional ...
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