Control method and system for achieving order preserving of semaphore in systemverilog

Abstract

The invention provides a control method and system for achieving order preserving of semaphore in systemverilog. Whether a current request source waits or not is determined according to a value of a static variable, and whether the current request source is interrupted or not is determined according to whether a value in an associative array is a special value or not, so that control over order preserving of the semaphore can be achieved. According to the control method and system, a wrapping class is established, a static variable, an associative array, a key-number checking and returning function and an order-preserving function are set, when a request applies for a key, whether a previous request is blocked or not is judged according to recorded values in the associative array so that whether the request is interrupted or not can be determined, and therefore the processing sequence of requests is guaranteed; the connotative defects and possible request non-order-preserving conditions of the semaphore in the systemverilog are avoided, the life cycle of the static variable and the characteristic that elements of the built-in associative array can be increased or deleted at any moment are fully adopted, and key returning of the semaphore and the requests of requesting the key are supervised and effectively controlled.

Description

technical field [0001] The invention relates to the field of server testing, in particular to a control method and system for realizing semaphore order preservation in systemverilog. Background technique [0002] With the increase in the logic scale and complexity of VLSI (Very Large Scale Integration, VLSI), the previous method of building a testbench with verilog has gradually failed to meet the verification requirements of large-scale chips, and the complexity of verification has become increasingly high. , the more powerful and comprehensive the functionality of the verification platform is required, the more abstract and reusable advanced verification methods have become the mainstream. Today's mainstream integrated circuit verification methodology is more built with systemverilog or based on systemverilog, such as: UVM (Universal Verification Methodology, universal verification methodology). Communication control between threads is an important part. Multiple requests...

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Problems solved by technology

[0005] The purpose of the present invention is to provide a control method and system for realizing semaphore order preservation in systemverilog, aiming to solve the hidden defects of semaphore in existing systemverilog and the situation that may cause requests to be out of order, and realize key return and request to semaphore Key requests are supervised and effectively controlled

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