Metal oxide semiconductor transistor and manufacturing method thereof

A technology of oxide semiconductors and manufacturing methods, which is applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of rising device on-resistance, affecting device reliability, increasing channel resistance, etc., and achieve increased gate Extreme capacitance, ultra-high characteristics, and damage prevention effect

Active Publication Date: 2018-06-01
深圳市点金贵金属精炼有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, one of the main problems currently faced by the current fabrication methods of metal-oxide-semiconductor (MOS) transistors is that as the feature size of the device shrinks (gate width), the length of the channel becomes shorter and shorter, and the same Under the concentration of the well region, the shorter the channel length, the easier it is for the source and drain to punch through, resulting in greater leakage, which affects the reliability of the device
If a multi-gate structure is adopted, the channel length will increase significantly, but it will inevitably lead to an increase in channel resistance and an increase in the on-resistance of the device, thereby affecting the reliability of the device.

Method used

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  • Metal oxide semiconductor transistor and manufacturing method thereof
  • Metal oxide semiconductor transistor and manufacturing method thereof
  • Metal oxide semiconductor transistor and manufacturing method thereof

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Embodiment Construction

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0024] see Figure 1-Figure 2 , figure 1 It is a schematic diagram of a partial planar structure of a metal-oxide-semiconductor transistor in a preferred embodiment of the present invention, figure 2 yes figure 1 A schematic cross-sectional view of a metal-oxide-semiconductor transistor is shown. The metal oxide semiconductor transistor includes a P-type well region, a source region and a drain region formed on the surface of the P-type well region, a gate formed on the source region and the drain region and on t...

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Abstract

The present relates to a metal oxide semiconductor transistor. The metal oxide semiconductor transistor comprises a P-type well region, a source region and a drain region formed at the surface of theP-type well region, a gate oxide layer formed on the source region, the drain region and the P-type well region, a gate polysilicon formed on the gate oxide layer and a polycrystalline oxide layer formed on the surface of the gate polysilicon, the gate polysilicon comprises a first portion at least partially located above the gate oxide layer of the source region, a second portion at least partially located above the gate oxide layer of the drain region and a third portion connected between the first portion and the second portion, and the third portion comprises circuitous structures to allowthe lengths of the circuitous structure to be larger than a distance between the first portion and the second portion.

Description

【Technical field】 [0001] The present invention relates to the technical field of semiconductor manufacturing technology, in particular, to a metal oxide semiconductor transistor and a manufacturing method thereof. 【Background technique】 [0002] Metal-oxide-semiconductor (MOS) transistors are basic devices in semiconductor manufacturing, and are widely used in various integrated circuits. However, one of the main problems currently faced by the current fabrication methods of metal-oxide-semiconductor (MOS) transistors is that as the feature size of the device shrinks (gate width), the length of the channel becomes shorter and shorter, and the same Under the concentration of the well region, the shorter the channel length, the easier it is for the source and drain to punch through, resulting in greater leakage, which affects the reliability of the device. If a multi-gate structure is adopted, the channel length will increase significantly, but it will inevitably lead to an i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/423H01L29/10H01L29/78H01L21/336H01L21/28
CPCH01L29/1033H01L29/401H01L29/42356H01L29/66568H01L29/78
Inventor 不公告发明人
Owner 深圳市点金贵金属精炼有限公司
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