Method for preparing a plasma nitrided gate dielectric layer

A gate dielectric layer, plasma nitridation technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem that the equivalent thickness of oxide cannot be reduced, gate leakage cannot be effectively reduced, and device reliability cannot be reduced. problems, to achieve the effect of reducing leakage current density, increasing nitrogen content, and improving reliability
CN104201109AActive Publication Date: 2014-12-10SHANGHAI HUALI MICROELECTRONICS CORP

Patent Information

Authority / Receiving Office
CN ยท China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI HUALI MICROELECTRONICS CORP
Publication Date
2014-12-10

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention provides a method for preparing a plasma nitrided gate dielectric layer. The method is characterized in that the method includes the steps of providing a substrate, forming a silicon dioxide layer on the substrate and doping nitrogen into a silicon oxide layer under the temperature condition of minus 100 degrees to 0 degree. With the nitrogen doped under the low temperature of minus 100 degrees to 0 degree; diffusion effect of nitrogen ions is reduced; more nitrogen ions gather on the upper surface of the silicon dioxide layer; more bonding between Si-O bond and nitrogen ions is interrupted; nitrogen content on the upper surface of the plasma nitrided gate dielectric layer is increased. Thus, not only is leakage current density reduced but also a high gate capacitance is provided. Furthermore, reliability of the device is improved, and B+ is inhibited from diffusing from gate polysilicon to gate oxide.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for preparing a plasma nitride gate dielectric layer. Background technique

[0002] Integrated circuits are made up of millions of basic building blocks such as transistors, capacitors and resistors. A transistor usually includes a source (Source), a drain (Drain) and a gate stack, and the composition of the gate stack is to form a dielectric layer (usually silicon dioxide) above the substrate (silicon), and then The dielectric layer is covered with a thin film (such as polysilicon) as an electrode.

[0003] With the rapid development of Very Large Scale Integration (VLSI) and Ultra Large Scale Integration (ULSI), the size of MOS devices has been continuously reduced. In order to increase the response speed of the device, increase the driving current and the capacity of the storage capacitor, the thickness of the silicon dioxide gate dielectric layer in the d...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More