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Imaging device

An imaging device and pixel technology, which is applied in the direction of electric solid-state devices, semiconductor devices, instruments, etc., can solve problems such as image quality degradation, insufficient shading, and error signals, and achieve the effect of reducing image quality degradation

Active Publication Date: 2018-06-05
CANON KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In the technique of Japanese Patent Application Laid-Open No. 2009-272374, the edges of the opening of the light-shielding portion are arranged close to the end of the charge holding unit in plan view, which results in insufficient light-shielding
Therefore, light incident to the charge holding unit may cause an erroneous signal, which causes deterioration of image quality

Method used

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Examples

Experimental program
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Effect test

no. 1 example

[0021] figure 1 is a block diagram showing the overall configuration of the imaging device 100 according to the present embodiment. The imaging device 100 has a pixel array 101 , a vertical scanning circuit 102 , a column amplification circuit 103 , a horizontal scanning circuit 104 , an output circuit 105 and a control circuit 106 . The imaging device 100 is a semiconductor device formed on a semiconductor substrate such as a silicon substrate, and is a CMOS image sensor in this embodiment. The pixel array 101 has a plurality of pixels 107 arranged two-dimensionally including a plurality of rows and a plurality of columns on a semiconductor substrate. The vertical scanning circuit 102 supplies a plurality of control signals for controlling a plurality of transistors included in the pixel 107 to be turned on (conducting state) or turned off (non-conducting state). A column signal line 108 is provided on each column of the pixels 107, and a signal from the pixel 107 is read o...

no. 2 example

[0039] Figure 6A and Figure 6B is a plan view of the pixel 107 of the imaging device 100 according to the second embodiment. Figure 6A is a plan view schematically showing a pattern near the surface of the semiconductor substrate in a plan view in a direction perpendicular to the semiconductor substrate, Figure 6B is a plan view mainly schematically showing the pattern of the light shielding portion 303 formed over the semiconductor substrate. In the description of the present embodiment, detailed descriptions of features common to the first embodiment are omitted. and, in Figure 6A and Figure 6B in, with Figure 3A and Figure 3B Features with the same functions in etc. are denoted by the same reference numerals, and descriptions of their functions may be omitted.

[0040] Such as Figure 6AAs shown, the present embodiment differs from the first embodiment in that two first transfer transistors 204 , two second transfer transistors 205 and two charge holding uni...

no. 3 example

[0044] Figure 7A and Figure 7B is a plan view of the pixel 107 of the imaging device 100 according to the third embodiment. Figure 7A is a plan view schematically showing a pattern near the surface of the semiconductor substrate in a plan view in a direction perpendicular to the semiconductor substrate, Figure 7B is a plan view mainly schematically showing the pattern of the light shielding portion 303 formed over the semiconductor substrate. In the description of the present embodiment, detailed descriptions of features common to those of the first embodiment or the second embodiment are omitted. and, in Figure 7A and Figure 7B in, with Figure 3A and Figure 3B Features with the same functions in etc. are denoted by the same reference numerals, and descriptions of their functions may be omitted.

[0045] Such as Figure 7A As shown, in this embodiment, similar to the second embodiment, two first transfer transistors 204 , two second transfer transistors 205 and...

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PUM

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Abstract

Provided is an imaging device including a substrate; a pixel array in which pixels are arranged in a two-dimensional manner on the substrate, each pixel including a photoelectric conversion unit thataccumulates charges generated from an incident light, a charge holding unit that holds the charges transferred from the photoelectric conversion unit, and an amplification unit that receives the charges transferred from the charge holding unit; and a light-shielding portion arranged to cover at least the charge holding unit. The photoelectric conversion unit and the charge holding unit in each pixel are aligned in a first direction in a top view orthogonal to the substrate. The charge holding units of the neighboring pixels are aligned in a second direction intersecting the first direction inthe top view. The light-shielding portion extends in the second direction and over the charge holding units, and covers a region between the charge holding units.

Description

technical field [0001] The present invention relates to imaging devices. Background technique [0002] In recent years, CMOS image sensors that allow low power consumption and fast readout are widely used as imaging devices for imaging systems such as digital still cameras or digital video cameras. As a readout method in an imaging device, a global electronic shutter in which all pixels have a common charge accumulation start time and end time has been proposed. [0003] In each pixel of the imaging device disclosed in Japanese Patent Application Laid-Open No. 2009-272374, in addition to the photoelectric conversion unit that performs photoelectric conversion, in order to realize the function of the global electronic shutter, it is also provided to hold the charge generated by the photoelectric conversion unit for a predetermined period of time. charge holding unit. When light is incident on the charge holding unit, the charges photoelectrically converted by the charge hol...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/146
CPCH01L27/14609H01L27/14643H01L27/14603H01L27/14623H01L27/1463H04N25/771H04N25/77H04N25/778G06T7/571
Inventor 关根宽大贯裕介小林昌弘
Owner CANON KK
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