Semiconductor device including multi-liner layer in trench

Abstract

The invention discloses a semiconductor device, and the semiconductor device may include a semiconductor substrate, a trench isolation layer on the semiconductor substrate and configured to define anactive region, and a multi-liner layer on an inside wall of a trench including the trench isolation layer. The multi-liner layer may include a first liner layer on the inside wall of the trench, a second liner layer on the first liner layer, and a third liner layer on the second liner layer.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2016-0162922 filed in the Korean Intellectual Property Office on December 1, 2016, the disclosure of which is hereby incorporated by reference in its entirety. technical field [0002] The inventive concepts relate to a semiconductor device, and / or to a semiconductor device including multiple liner layers in a trench. Background technique [0003] Due to the high-density integration of semiconductor devices, it may be difficult for transistors to operate stably. A transistor included in a semiconductor device may include an active region defined by a trench isolation layer. When the trench isolation layer is clearly separated physically or electrically from the active region, the transistor can operate stably. Contents of the invention [0004] The inventive concepts provide a semiconductor device including a multi-liner layer in a trench for clearly separating an active region fr...

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Problems solved by technology

[0003] Due to the high-density integration of semiconductor devices, it may be difficult for transistors to operate stably

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