Shunt quitting control circuit and method for automatic shunt I/F conversion circuit
A conversion circuit and automatic shunt technology, applied in control/regulation systems, logic circuit interface devices, logic circuit connection/interface layout, etc., can solve the problems of increased hardware, difficulty in implementation, setting of hysteresis, etc., to achieve a wide range of applications , Conducive to miniaturization and flexible settings
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Embodiment 1
[0028] refer to Figure 1-2 , the present embodiment provides a kind of exit shunt control circuit of automatic shunt I / F conversion circuit, adopts FPGA or CPLD all-digital realization, and its composition comprises:
[0029] Clock management unit 1, direct conversion state synchronous D flip-flop 2, shunt conversion state low-frequency synchronous D flip-flop 3, shunt conversion state high-level frequency synchronous D flip-flop 4, count input logic AND gate 5, count clear logic OR gate 6. A synchronous addition counter 7 , an exit shunt control logic operation unit 8 , an exit shunt control latch and unlock unit 9 , an exit shunt control synchronous output D flip-flop 10 and a NOT gate 11 .
[0030] Further, the input of the exit shunt control circuit includes a clock, a shunt state comparison signal, and a direct conversion state comparison signal, and its output is an exit shunt control signal.
[0031] The input shunt state comparison signal and the direct conversion st...
Embodiment 2
[0049] refer to figure 2 and image 3 , the present embodiment provides a control method for an automatic shunt I / F conversion circuit to exit shunt, including:
[0050] S1. The shunt state comparison signal changes from high level to low level, indicating that the I / F conversion circuit will enter the shunt conversion working state, and the low-frequency synchronous D flip-flop 3 and the high-frequency synchronous D flip-flop 4 compare the shunt state in the shunt conversion state The signal is synchronized, and the low-frequency synchronous D flip-flop 3 in the shunt conversion state passes through the NOT gate 11 and passes the counting and clearing logic OR gate 6 to clear the synchronous addition counter 7;
[0051] Wherein, the input shunt state comparison signal and the direct conversion state comparison signal are signals obtained by comparing the output of the integration circuit of the I / F conversion circuit with the set high and low threshold levels. When the out...
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