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A system and method for reducing data storage bandwidth requirements external to an accelerator

A technology for external data and storage bandwidth, applied in the field of data processing, can solve problems such as high cost, and achieve the effect of reducing occupation, reducing the number of loading times, and reducing storage bandwidth requirements

Active Publication Date: 2022-03-04
SOUTH CHINA UNIV OF TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the increase of the bandwidth of the external memory depends on the development of storage technology, and often needs to pay a higher cost

Method used

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  • A system and method for reducing data storage bandwidth requirements external to an accelerator
  • A system and method for reducing data storage bandwidth requirements external to an accelerator
  • A system and method for reducing data storage bandwidth requirements external to an accelerator

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Embodiment Construction

[0039] refer to figure 1 with figure 2 , a system for reducing data storage bandwidth requirements external to an accelerator, comprising:

[0040] The multiplication and accumulation calculation unit is used to process input data and weights in parallel and output data to the cache unit or arithmetic logic unit, the processing includes multiplication and accumulation operations, comparison operations, batch normalization operations and activation operations; the multiplication and accumulation The calculation unit includes a calculation matrix composed of P*P PE calculation subunits, and the calculation matrix is ​​used to process the multiplication and accumulation operation of input data and weights in parallel. In the calculation matrix, the data goes to the right or to the left Horizontal flow and upward or downward vertical flow, the P is a positive integer;

[0041] The cache unit is used to store the data output by the multiplication and accumulation calculation uni...

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Abstract

The present invention discloses a system and method for reducing the demand for external data storage bandwidth of an accelerator. The system includes: a multiplication and accumulation calculation unit, a cache unit and an arithmetic logic calculation unit, wherein the multiplication and accumulation calculation unit includes a P*P PE calculation unit A calculation matrix composed of subunits is used to process multiplication and accumulation operations of input data and weights in parallel. In the calculation matrix, data flows horizontally to the right or left and vertically flows upwards or downwards. The PE calculation subunit can load input data by row and column, which makes the data in this system reusable, reduces the number of data loading times, and reduces the data bandwidth occupation, thereby reducing the speed of the convolutional neural network. Storage bandwidth requirements for data external to the server. The invention can be widely used in the field of data processing.

Description

technical field [0001] The invention relates to the field of data processing, in particular to a system and method for reducing the bandwidth requirement of accelerator external data storage. Background technique [0002] In recent years, as the popularity of artificial intelligence has risen, more and more deep learning algorithm models have been proposed to solve current research problems, and convolutional neural networks have made great achievements in the field of machine vision. Due to the reusability of its weights, the convolutional neural network greatly reduces the number of its weight parameters and accelerates the computational efficiency of deep learning models. However, with the deepening of the research on convolutional neural networks, models with more layers and more complex structures have been proposed, and their own massive convolution operations require hardware to load a large amount of weight data and input data. Intelligent hardware processing units ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06N3/063G06F9/50
CPCG06F9/5005G06N3/063
Inventor 李斌罗聪吴朝晖
Owner SOUTH CHINA UNIV OF TECH
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