A data transmission method based on AFP protocol

Abstract

The present invention provides a data transmission method based on the AFP protocol, including step S100, the sending end judges whether the bus is in an idle state; step S200, when the bus is in an idle state, the sending end sends a data frame to the bus; step S300 The receiving end receives the data frame sent by the sending end according to the clock frequency configured by the sending end. The present invention realizes the equal status of each port on the bus through the mode of driving the clock line and the data line by the sending end, without the purpose of distinguishing the master-slave mode.

Description

technical field [0001] The invention relates to the technical field of data communication, in particular to a data transmission method based on the AFP protocol. Background technique [0002] At present, microcontroller networking and communication are usually based on single-bus, I2C and SPI buses. These buses can effectively complete single-byte data transmission and reception, and are insufficient for custom frame transmission and reception processing. At present, there are more and more microprocessors and peripheral chips in a single product, and the communication between processors is very important. The above interface protocols are relatively complicated to implement for the communication network between chips, and have their own defects. The single bus belongs to asynchronous communication. Its disadvantage is that it has requirements for the clock and needs to meet specific pulse width conditions. The slave machine can pull down the clock line under certain condit...

AI Technical Summary

Problems solved by technology

At present, there are more and more microprocessors and peripheral chips in a single product, and the communication between processors is very important. The above interface protocols are more complicated to implement for the communication network between chips, and have their own defects.

The single bus belongs to asynchronous communication. Its disadvantage is that it has requirements for the clock and needs to meet specific pulse width conditions. The slave machine can pull down the clock line under certain conditions, and the bus may be locked if the system is not well designed; the disadvantage of SPI is that the four-wire system occupies hardware resources, and the multi-machine communication mode is one master and multiple slaves, and the status of each interface is not uniform. The slave is always waiting for the master to send commands

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