Remote upgrade system and method for FPGA program based on JTAG standards

Abstract

The invention discloses a remote upgrade system and method for an FPGA program based on JTAG standards. The system comprises a storage module and a microprocessor; the storage module is used for storing an upgrade file of the FPGA program; the microprocessor is used for reading and parsing the upgrade file of the FPGA program, and under the JTAG standards, by controlling serial IO ports to simulate the level change, parsed upgrade data of the FPGA program and a JTAG instruction are written into an FPGA chip to make the FPGA program in the FPGA chip upgraded. By means of the remote upgrade system and method for the FPGA program based on the JTAG standards, the query overhead is reduced, and meanwhile the query process is shortened; the online configuration process is completed according tothe JTAG standards, the purpose of remotely upgrading an FPGA is ingeniously achieved through the technical means, and the remote upgrade system and method have the highest priority. Compared with anexisting technology of configuring the FPGA through a JTAG interface, the remote upgrade system and method have the advantages of low cost, high speed, good universality and high stability.

Description

technical field [0001] The present invention relates to the field of computer technology, more specifically, to a system and method for remotely upgrading FPGA programs based on the JTAG standard. Background technique [0002] At present, FPGA chips have been widely used in products on the market, especially Altera series FPGAs with relatively low cost. There are many ways to configure FPGA program upgrades, and the most widely used is the IEEE 1149.1 standard, which is the JTAG standard. Configuring FPGA in JTAG mode not only has higher priority than any other configuration mode (AS, AP, PS, FPP, etc.), but also has the characteristics of high robustness and low cost. [0003] The four pins required for device operation in the JTAG configuration mode are TDI, TDO, TMS, and TCK. Through these four pins, the microprocessor (DSP, ARM, single-chip microcomputer, etc.) can configure the FPGA based on the JTAG standard. Online configuration completes the upgrade. Among them, T...

AI Technical Summary

Problems solved by technology

[0006] For the defects of the prior art, the purpose of the present invention is to solve the technical problem that there are multiple defects in the FPGA program upgrade mode under the existing JTAG standard

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