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Chip test system and method

A chip test and chip technology, applied in the field of software testing, can solve the problems of long-term use of ATE and high test costs, and achieve the effects of improving test efficiency, reducing test costs and reducing use time.

Inactive Publication Date: 2018-09-28
HISENSE VISUAL TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the problem of using ATE for a long time when testing the chip through the existing technology, resulting in high testing cost, this application discloses a chip testing system and method through the following embodiments

Method used

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Embodiment Construction

[0060] In order to solve the problem that ATE needs to be used for a long time when testing a chip in the prior art, resulting in high testing cost, the present application discloses a chip testing system and method through the following embodiments.

[0061] The first embodiment of the present application discloses a chip testing system, see figure 1 As shown in the structural diagram, the chip testing system includes a microprocessor 100 and a programmable logic device 200 .

[0062] Wherein, the programmable logic device 200 is connected with a host computer, and after receiving the test instruction transmitted by the host computer, the programmable logic device 200 determines the type of the test instruction.

[0063] The programmable logic device 200 is connected to a host computer, and data can be exchanged with each other. After the host computer generates a test command according to the received operation, it transmits the test command to the programmable logic device...

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Abstract

The application discloses a chip test system and method. The chip test system includes a microprocessor and a programmable logic device. The programmable logic device is connected with a host computer. After receiving a test command transmitted by the host computer, the programmable logic device determines the type of the test command; if the test command is a first test command, the programmablelogic device acquires a first test sequence corresponding to the first test command, generates a first test stimulus according to the first test sequence, and transmits the first test stimulus to a chip; and if the test command is a second test command, the programmable logic device sends a second-test-sequence request to the microprocessor, generates a corresponding second test stimulus accordingto a second test sequence transmitted by the microprocessor, and transmits the second test stimulus to the chip. The system is simple in a structure and low in costs. Furthermore, by using the solution, which is disclosed by the embodiment of the application, to test the chip, use time of ATE can be reduced, and test costs can be further reduced.

Description

technical field [0001] The present application relates to the technical field of software testing, in particular to a chip testing system and method. Background technique [0002] A chip is a silicon chip with built-in integrated circuits, often used as part of electronic equipment such as computers. In order to ensure the quality of the chip, before the chip goes on the market, it is usually necessary to test the chip, so that the chip with normal function can be screened out through the test result. [0003] In the prior art, when testing a chip, testers usually use dedicated ATE (automatic test equipment, automated test equipment) to test the chip. During the test process, the tester needs to control the ATE according to the chip description written by the chip designer, so that the ATE generates various test stimuli corresponding to the chip, and tests the chip through the test stimuli to judge the various functions of the chip through the test results Is it normal. ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/26
CPCG06F11/26
Inventor 滕立伟于岗
Owner HISENSE VISUAL TECH CO LTD
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