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Electrostatic protection circuit applied to radio frequency circuit

An electrostatic protection, radio frequency circuit technology, applied in the direction of circuits, electrical components, electric solid devices, etc., can solve the problems of increasing the delay time, increasing the time for discharging ESD current, etc., to achieve faster discharge, better protection, and discharge. full effect

Inactive Publication Date: 2018-10-19
丹阳恒芯电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The detection circuit should not only correctly distinguish between ESD pulses and normal power-on pulses, but also increase the delay time as much as possible, thereby increasing the time for discharging ESD current

Method used

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  • Electrostatic protection circuit applied to radio frequency circuit
  • Electrostatic protection circuit applied to radio frequency circuit

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Embodiment Construction

[0029] Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:

[0030] see figure 2 As shown, in the following embodiments, the electrostatic protection circuit of the present invention includes:

[0031] A diode protection circuit composed of a first diode D1 and a second diode D2; a high voltage generating circuit composed of a second NMOS transistor NM2, a first PMOS transistor PM1 and a second PMOS transistor PM2; a detection circuit, It is composed of the first resistor R1 and the first capacitor C1; a buffer circuit is composed of the first inverter INV1, the third NMOS transistor NM3, the second resistor R2 and the second capacitor C2; a delay circuit is composed of the fourth NMOS The transistor NM4 and the third PMOS transistor PM3 are composed; a discharge circuit is composed of the first NMOS transistor NM1.

[0032] For the detection circuit composed of resistor R1 and capacitor C1, for exampl...

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PUM

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Abstract

The invention discloses an electrostatic protection circuit applied to a radio frequency circuit. The electrostatic protection circuit comprises a diode protection circuit, a high voltage generation circuit, a detection circuit, a buffer circuit, a delay circuit and a bleeder circuit. The high voltage generation circuit and the delay circuit are both formed by the combination of PMOSs and NMOSs. The buffer circuit is formed by an inverter, an MOS, a resistor and a capacitor. When a chip is working normally, the electrostatic protection circuit does not work. When an electrostatic event occurs,the electrostatic protection circuit can generate a higher voltage to discharge a current generated by static electricity, the time for discharging the static electricity also can be increased, and thus the chip has better antistatic performance.

Description

technical field [0001] The invention relates to the field of electrostatic protection, in particular to a power clamp electrostatic protection circuit. Background technique [0002] In recent years, with the rapid development of integrated circuit technology, the line width of MOS transistors has become narrower and narrower, the junction depth has become shallower and shallower, and the thickness of the gate oxide layer has become thinner and thinner, all of which have accelerated the circuit design for electrostatic protection ( ESD, Electro-Staticdischarge) requirements. When the line width is 1µm, ESD events have little impact on the circuit. When entering the era of 0.18µm and 0.13µm, especially the era below 90nm, ESD has become an urgent problem. Corresponding electrostatic protection circuits are required in radio frequency circuits and various related circuits. [0003] Common ESD is divided into HBM (Human body model) mode, MM (machine model) mode and CDM (Charge...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02
CPCH01L27/0266H01L27/0255
Inventor 陈磊
Owner 丹阳恒芯电子有限公司