Wafer processing method

Abstract

A wafer processing method is provided. The method includes a first cutting groove forming step of forming a first cutting groove having finished depth amount to thickness of a device chip by a first cutting tool along a dividing predetermined line from the front side of the wafer; a sealing step of sealing the wafer with a sealing material; a grinding step of grinding the wafer from the back sideof the wafer to the finished thickness of the device chip to expose the sealing material in the first cutting groove; an alignment step of detecting an alignment mark through the sealing material fromthe front side of the wafer by using a visible light imaging member, and detecting a to-be-cut dividing predetermined line according to the alignment mark; and a dividing step of cutting the sealingmaterial in the first cutting groove by a second cutting tool from the front side of the wafer along the dividing predetermined line, to divide the wafer into respective device chips surrounded by thesealing material on a front surface and four side surfaces, and the region photographed by the visible light imaging member is obliquely irradiated with light by an inclined light member while the alignment process is performed.

Description

technical field [0001] The invention relates to a wafer processing method, and the wafer is processed to form a 5S mold package. Background technique [0002] As a structure to achieve miniaturization and high-density mounting of various devices such as LSI and NAND flash memory, for example, a chip size package (CSP) in which device chips are packaged in chip sizes has been put into practical use, And it is widely used in mobile phones, smart phones, etc. In addition, among these CSPs, in recent years, a CSP that seals not only the front surface of a chip but also the entire side surface of a chip with a sealing material, that is, a so-called 5S molded package, has been developed and put into practical use. [0003] Conventional 5S molded packages are produced through the following steps. [0004] (1) External connection terminals called devices (circuits) and bumps are formed on the front surface of a semiconductor wafer (hereinafter, sometimes roughly referred to as a w...

AI Technical Summary

Problems solved by technology

[0013] However, in the alignment method described in the above publication, instead of the cutting tool for dicing, it is necessary to attach a wide cutting tool for edge trimming to the spindle to remove the sealing material on the outer peripheral portion of the wafer. It takes time and labor to replace the cutting tool and remove the sealing material on the outer peripheral part by edge trimming, and there is a problem of poor productivity

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