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Instruction conversion method and device

An instruction conversion and instruction technology, applied in the computer field, can solve the problem of not realizing 64-bit MIPS platform conversion operation and other problems

Active Publication Date: 2022-06-21
LOONGSON TECH CORP
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  • Summary
  • Abstract
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  • Claims
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Problems solved by technology

[0004] In the prior art, only the multi-precision addition and subtraction instructions ADDC, SUBC, ADDE, and SUBE are converted into instructions on the 32-bit MIPS platform, and the conversion operation on the 64-bit MIPS platform has not been realized.

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  • Instruction conversion method and device
  • Instruction conversion method and device

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Embodiment Construction

[0102] In order to make the above objects, features and advantages of the present invention more clearly understood, the present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments.

[0103] refer to figure 1 , showing a flow chart of the steps of Embodiment 1 of an instruction conversion method of the present invention, which may specifically include the following steps:

[0104] Step 101, obtain the arithmetic instruction of the intermediate code of the LLVM compiler;

[0105] In the process of converting high-level language instructions into target platform instructions by the LLVM compiler, the LLVM compiler first converts the high-level language instructions into intermediate language instructions IR, and then converts the intermediate language instructions IR into instructions with SelectionDAG nodes.

[0106] In this embodiment of the present invention, the arithmetic instruction of the intermediate c...

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Abstract

The embodiment of the present invention provides an instruction conversion method, comprising: obtaining the arithmetic instruction of the intermediate code of the underlying virtual machine LLVM compiler; determining the operand and the operation code of the arithmetic instruction of the intermediate code of the LLVM compiler; determining the system of the target platform number of bits; in the instruction set of the target platform, determine the target opcode corresponding to the arithmetic instruction opcode and the system bit number of the LLVM compiler intermediate code; adopt the operand and the target opcode to generate the target Arithmetic instructions for the platform. In the embodiment of the present invention, when the LLVM compiler converts the arithmetic instruction of the intermediate code into the arithmetic instruction of the target platform, it can generate an arithmetic instruction matching the system bit number of the target system according to the system bit number of the target platform.

Description

technical field [0001] The present invention relates to the field of computer technology, in particular to an instruction conversion method and an instruction conversion device. Background technique [0002] The LLVM (Low Level Virtual Machine, low-level virtual machine) compiler is a compiler that can convert high-level language code into target platform code. The LLVM compiler first converts the high-level language code into LLVM's intermediate language instructions IR, and then converts the intermediate instructions into target platform code. [0003] The intermediate language instruction IR of the LLVM compiler needs to be converted into an instruction with a SelectionDAG node through the SelectionDAG node selector. The ISD command space includes an enumeration list recording all SelectionDAG node types and value types, where the SelectionDAG nodes include: multiple-precision addition and subtraction instructions ADDC, SUBC, ADDE, SUBE. [0004] In the prior art, only ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F8/41
CPCG06F8/41G06F9/45516
Inventor 张利霞余银
Owner LOONGSON TECH CORP
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