A convolution neural network accelerator

Abstract

A convolution neural network accelerator includes sorting and bitwise aligning the original weights in the calculation order, so that weight matrix is obtained; removing the slack bits in the weight matrix to obtain a reduced matrix with vacancies, and filling the vacancies by using the basic bits in each column of the reduced matrix according to the calculation order to obtain an intermediate matrix, removing the empty rows in the intermediate matrix, and taking the empty position 0 of the intermediate matrix to obtain a kneading matrix, and kneading each row of the matrix as a kneading weight; Obtaining the position information of each bit in the kneading weight corresponding to the activation value according to the correspondence relationship between the activation value and the basic bits in the original weight; sending the kneading weight to a splitting accumulator, and the splitting accumulator bitwise divides the kneading weight into a plurality of weight segments, and accordingto the position information, the weight segments and the corresponding activation values are summed, and the processing result is sent to an addition tree, and the processing result is shifted and added to obtain an output characteristic map.

Description

technical field [0001] The invention relates to the field of neural network computing, and in particular to a convolutional neural network accelerator. Background technique [0002] Deep convolutional neural networks have made significant progress in machine learning applications such as real-time image recognition, detection, and natural language processing. To improve accuracy, advanced deep convolutional neural network (DCNN) architectures possess complex connections and a large number of neurons and synapses to meet the demands of high precision and complex tasks. In the convolution operation, the weights are multiplied by the corresponding activation values, and finally the products are added up and summed. That is, weights and activation values ​​form a pair. [0003] Given the limitations of traditional general-purpose processor architectures, many researchers have proposed dedicated accelerators for specific computational modes of modern DCNNs. DCNN consists of mu...

AI Technical Summary

Problems solved by technology

(2) Most of the bits of some weights are slack

However, achieving this goal will be difficult because existing MAC computing models need to be modified and the hardware architecture rebuilt to support the new computing model

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