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A quantum reversible circuit integration method based on a Boolean expression graph

A Boolean expression and circuit synthesis technology, applied in CAD circuit design, electrical digital data processing, special data processing applications, etc., can solve problems such as increasing the difficulty of quantum circuits, and achieve quantum cost reduction, quantum number reduction, and quantum reduction. The effect of digits

Pending Publication Date: 2019-04-02
卜登立
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

On the other hand, the quantum reversible circuits obtained by these methods have more qubits, and under the current quantum technology, qubits are a very precious hardware resource, and more qubits increase the difficulty of realizing quantum circuits

Method used

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  • A quantum reversible circuit integration method based on a Boolean expression graph
  • A quantum reversible circuit integration method based on a Boolean expression graph
  • A quantum reversible circuit integration method based on a Boolean expression graph

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Experimental program
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Effect test

Embodiment 1

[0048] Boolean Expression Diagram (BED) is a decision diagram representation that uses operator nodes to extend binary decision diagrams. Since BED is a non-standard representation, for a function, its BED representation is possible With fewer nodes than its BDD representation, quantum reversible circuit synthesis using the BED representation model has the potential to reduce quantum cost and qubit number. The present invention proposes a BED-based quantum reversible circuit synthesis method, using BED as the representation model of Boolean functions, traversing the BED in a depth-first-order manner, and performing quantum reversible circuit synthesis node by node. In the node synthesis process, according to the node The point function is based on the NCV quantum gate library to construct the locally optimal quantum reversible subcircuit of the node. In order to further reduce the quantum cost and the number of qubits, the variables are sorted by using the variable grouping ba...

Embodiment 2

[0094] Such as Figure 9 Shown, utilize the method in embodiment 1 to carry out quantum reversible circuit synthesis to a given function, Figure 9 (a) is a given function that contains 3 outputs f 1 , f 2 and f 3 , using the XOR sum representation of the product, and there are 5 product terms in total: x 3 x 4 、x 1 x 2 x 3 x 4 , and

[0095] 1) Group variables according to the sharing degree of variable pairs to realize variable sorting

[0096] Calculate the sharing degree of the variable pair according to the 5 product items, and pair the variables according to the size of the sharing degree, and get as follows Figure 9 The variable grouping shown in (b) g={(3,4),(1,2)}.

[0097] 2) According to the grouping of the obtained variables, BED is constructed by the function expression

[0098] According to the variable grouping g={(3,4),(1,2)} obtained in the previous step, the five product items are analyzed in turn, and the XOR operation between the product ...

Embodiment 3

[0102] Utilize the method in embodiment 1 to carry out quantum reversible circuit synthesis to a set of functions, and the expression of the function adopts the XOR sum representation of the product, namely The exclusive-or-sum representation of this product is obtained by the EXORCISM-4 tool (Mishchenko & Perkowski 2001) using the "q0" parameter. Calculate the quantum cost and quantum number of the synthesized circuit, and the results are shown in Table 1.

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Abstract

The invention discloses a quantum reversible circuit integration method based on a Boolean expression graph, and belongs to the technical field of quantum reversible circuit integration and design. The method comprises the following steps of S1 grouping the function variables according to the sharing degree of variable pairs, and achieving the variable sorting; S2 according to the obtained variable group, constructing a Boolean expression graph (BED) by a function expression; and S3 carrying out quantum reversible circuit synthesis according to the BED obtained in the step S2. By taking a BEDas a representation model of a Boolean function, traversing the BED in a depth-first post-order mode, carrying out quantum reversible circuit synthesis one by one, and constructing a local optimal quantum reversible sub-circuit of a node based on an NCV quantum gate library according to the node function in the node synthesis process, the variables of the sharing degree are grouped based on the variables to realize the sorting of the variables, and the quantum cost and the quantum digits are further reduced.

Description

technical field [0001] The invention relates to the technical field of quantum reversible circuit synthesis and design, in particular to a quantum reversible circuit synthesis method based on a Boolean expression graph. Background technique [0002] A reversible circuit is a circuit form that adopts an information lossless computing mode. Due to the inherent reversibility of quantum computing, reversible circuits have become the basic components of quantum computers and the core part of quantum circuit models. Therefore, quantum circuits and quantum computers have become important applications of reversible circuits. Reducing the quantum cost of reversible circuits can help reduce the computational complexity of quantum circuit implementations, and reducing the number of qubits in reversible circuits can help reduce the hardware complexity of quantum circuit implementations. [0003] Decision Diagram (DD) is a graphical representation of functions, and the synthesis of quant...

Claims

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F30/30
Inventor 卜登立
Owner 卜登立
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