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Efficient data recovery of writing path errors

An error and data technology, applied in the field of flash memory devices, can solve problems such as parity bit data calculation errors

Active Publication Date: 2019-04-23
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, an error in a data block may result in an error in the calculation of the parity bit data
Therefore, parity bit data may also need to be corrected, which may introduce additional delay in the data path

Method used

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  • Efficient data recovery of writing path errors
  • Efficient data recovery of writing path errors
  • Efficient data recovery of writing path errors

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Embodiment Construction

[0022] Certain aspects and embodiments of the disclosure are provided below. Some of these aspects and embodiments may be applied independently, and some of them may be applied in combinations obvious to those skilled in the art. In the following description, for purposes of explanation, specific details are set forth in order to provide a thorough understanding of the embodiments. It may be evident, however, that various embodiments may be practiced without these specific details. The drawings and description are not limiting.

[0023] The ensuing description provides examples, and is not intended to limit the scope, applicability, or configuration of the disclosure. Rather, the ensuing description of the example embodiments will provide those skilled in the art with an enabling description for implementing the example embodiments. It being understood that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of...

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Abstract

A system and method is provided for a flash memory device to improve the write performance and hide write thepath error correction delay in the event of a write path error. Some embodiments may provide the immediate parity correction to allow user data sharing the same stripe as a block of data having an error to be programmed into the flash memory prior to the error data being corrected. Further,the selected stop may allow programming of some independent data in different flash memory chips or planes during write path error correction.

Description

technical field [0001] The present invention relates to an apparatus, method, and computer readable instructions for a flash memory device to provide efficient data recovery in the event of write path errors by accelerating write performance and hiding write path error correction delays. Background technique [0002] Non-volatile memory devices such as solid-state drives (SSDs) are finding new applications in consumer electronics. For example, they are replacing hard disk drives (HDDs), which typically include rapidly spinning platters (platters). Non-volatile memory, sometimes referred to as "flash memory" or "flash memory device" (for example, NAND flash memory device and NOR flash memory device), is used in media storage, cameras, mobile phones, mobile computers , laptops, USB flash drives, etc. Non-volatile memory can provide a relatively reliable, compact, cost-effective, and easily accessible method of storing data when the power is off. [0003] Flash memory contro...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/10G11C29/04
CPCG06F11/1068G11C29/04G11C2029/0411
Inventor 蔡宇张帆李尚哲
Owner SK HYNIX INC