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Formation method of bonding structure between wafers, bonding method of wafers

A bonding structure and wafer technology, which is applied in semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve problems such as difficulty in guaranteeing bonding strength, and achieve high bonding strength and improved strength

Active Publication Date: 2021-04-13
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, when the existing metal-metal bonding method is used to form a three-dimensional packaging structure, the surface of the bonding metal layer is prone to dishing defects. When the first wafer and the second wafer are bonded, It is difficult to guarantee the strength of the bond

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  • Formation method of bonding structure between wafers, bonding method of wafers
  • Formation method of bonding structure between wafers, bonding method of wafers
  • Formation method of bonding structure between wafers, bonding method of wafers

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Embodiment Construction

[0028] As mentioned in the background art, copper dishing defects are likely to occur on the surface of the bonding metal layer, and it is difficult to guarantee the bonding strength when wafers are bonded.

[0029] Research has found that when forming an insulating layer and a bonding metal layer in the insulating layer, the material of the insulating layer is usually silicon nitride, and the material of the metal layer is copper. The process of forming the bonding metal layer includes: A through hole (or groove) is formed in the layer; an electroplating process is used to form a metal layer covering the insulating layer, and the metal layer fills the through hole (or groove); a chemical mechanical polishing process is used to planarize the metal layer to The surface of the insulating layer acts as a stop layer, forming a bonding metal layer in the via hole (or trench). During the chemical mechanical polishing process, due to the low grinding rate of the insulating layer of t...

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Abstract

A method for forming a bonding structure between wafers and a method for bonding wafers, wherein the method for forming a bonding structure between wafers includes: providing a substrate; forming a stop layer on the substrate, forming a stop layer in the stop layer There are through holes, the grinding ratio of the stop layer and the metal layer material layer is greater than the grinding ratio of silicon nitride and the metal layer material layer; a metal material layer is formed on the stop layer, and the metal material layer is filled with the through holes. Holes; planarizing the metal material layer up to the stop layer, forming a bonding metal layer in the through hole, the bonding metal layer and the stop layers on both sides constitute a bonding structure. The method of the invention prevents the occurrence of concave defects on the surface of the bonding metal layer, and improves the bonding strength.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a bonding structure between wafers and a method for bonding wafers. Background technique [0002] With the requirements of high integration and multi-functionality of microelectronic devices, the existing two-dimensional packaging technology is difficult to meet the packaging requirements, while three-dimensional packaging has the advantages of small size, light weight, and reduced signal delay, and is becoming a microelectronic device packaging technology. mainstream technology. Bonding is the key process to achieve three-dimensional packaging. There are many bonding methods used in three-dimensional packaging, including: metal-metal bonding, oxide direct bonding, anodic bonding, adhesive bonding, and solder-based bonding , ultrasonic bonding, glass dielectric bonding, etc. Metal-metal bonding is widely used in three-dimensional packaging structu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/18
CPCH01L21/185H01L21/76831H01L23/528H01L23/5329H01L21/762H01L2221/1057
Inventor 高林蒋阳波王光毅
Owner YANGTZE MEMORY TECH CO LTD
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