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A nand-flash error data redundancy replacement method

A technology of error data and redundancy, which is applied in the field of redundant replacement of Nand-Flash error data, can solve the problems of long time consumption and achieve the effect of short time consumption

Active Publication Date: 2022-05-24
XI AN UNIIC SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] In order to solve the technical problem that the existing Nand-Flash write operation redundant replacement method takes a long time, the present invention provides a Nand-Flash error data redundant replacement method

Method used

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  • A nand-flash error data redundancy replacement method
  • A nand-flash error data redundancy replacement method
  • A nand-flash error data redundancy replacement method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0063] Embodiment 1 (corresponding to the above-mentioned first redundancy replacement method):

[0064] like figure 2 , 3 As shown, taking the 32-bit internal data bus as an example, a FIFO with a depth of 6 is used, and each depth of the lower two depths of the FIFO is divided into two parts to store the location information (address index) of the bad bytes in the page buffer. , the upper four depths are used to store the 4-byte data containing the bytes to be replaced read from the page buffer according to the position information in the lower two depths. When the FIFO is output, according to the corresponding position information (address index), the 4 bytes (B0~B3) to be replaced are selected from the byte data stored in the upper four depths, and then written into the redundant area of ​​the page buffer. After adopting this method, for a 32-bit internal bus, the entire redundancy replacement process requires 7 clock cycles, of which 2 cycles are used to read addresses...

Embodiment 2

[0065] Embodiment 2 (corresponding to the above-mentioned second redundancy replacement method):

[0066] like Figure 4 As shown, taking the 32-bit internal data bus as an example, first, according to the pagebuffer address corresponding to the damaged unit of the array, read four 32-bit data from the page buffer into the storage FIFO, and set the low address of the page buffer address corresponding to the damaged unit of the array. Two bits are stored in an additionally introduced index FIFO; then, four bytes to be replaced are taken out from each of the four data according to the address stored in the index FIFO to form a word; finally, the spelled word is written into the Redundant area of ​​the page buffer. The advantage of introducing the index FIFO is that the four data of the page buffer can be read in any order.

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Abstract

In order to solve the technical problem that the existing Nand-Flash write operation redundancy replacement method takes a long time, the present invention provides a Nand-Flash error data redundancy replacement method. The FIFO is clearly divided into two parts, one part is used to store the position of the byte to be replaced in the page buffer, and the other part is used to store the read-back data containing the replaced byte. When outputting, all the bytes to be replaced are selected by hardware and written at once. Into the redundant area, the entire redundant replacement process takes less time.

Description

technical field [0001] The invention relates to a redundancy replacement method for Nand-Flash error data. Background technique [0002] like figure 1 As shown, during the existing Nand-Flash write operation, the redundant replacement method of the wrong data is to move the data corresponding to the wrong unit to the good redundant unit through the firmware program after the data is written into the Page-buffer to complete the replacement. The specific steps as follows: [0003] 1) It takes 2 clock cycles to read the page buffer address corresponding to the damaged unit of the array; [0004] 2) According to the address of step 1), read word 0, which requires 1 clock cycle; [0005] 3) It takes 3 clock cycles to adjust the position of the replacement unit; [0006] 4) It takes 1 clock cycle to move the data to the redundant area and shield the other three bytes; [0007] ... [0008] 11) According to the address of step 1), read word3, which requires 1 clock cycle; ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10G06F12/02
Inventor 李乾男龙晓东薛小飞
Owner XI AN UNIIC SEMICON CO LTD
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