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A method and a device for realizing parallel CRC calculation

A technique for realizing methods and calculation results, applied in digital transmission systems, electrical components, error prevention, etc., can solve problems such as low portability and poor versatility, and achieve reduced difficulty, easy hardware implementation, improved versatility and portability sexual effect

Active Publication Date: 2019-06-07
CETHIK GRP
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Problems solved by technology

[0005] The purpose of the present invention is to provide a method and device for realizing parallel CRC calculation, which overcomes the problems of poor versatility and low portability in the prior art, and is easy to implement on hardware

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  • A method and a device for realizing parallel CRC calculation
  • A method and a device for realizing parallel CRC calculation
  • A method and a device for realizing parallel CRC calculation

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Embodiment Construction

[0033] The technical solution of the present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments, and the following embodiments do not constitute a limitation of the present invention.

[0034] Such as figure 1 As shown, an implementation method of parallel CRC calculation includes:

[0035] S101. Obtain the highest power k of the generator polynomial and the input parallel data width n, and obtain the arrangement e of all powers in the generator polynomial except 0 and k powers from small to large 0 1 2 m-2 m-1 and the quantity m.

[0036] In this embodiment, the input parallel data D=[D 0 D. 1 …D n-3 D. n-2 D. n-1 ], n is the input parallel data width, CRC initial value C=[C 0 C 1 …C k-3 C k-2 C k-1 ], k is the CRC width, that is, the highest power k of the generator polynomial, and the input parallel data width n is not greater than the CRC width k.

[0037]S102. Intercept the upper n bits of the CRC ...

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Abstract

The invention discloses a method and a device for realizing parallel CRC calculation. The method includes: intercepting high n bits of a CRC initial value C; performing XOR operation with the input parallel data D to generate a first intermediate result X; and performing a feedback XOR operation by using the first intermediate result X to generate a second intermediate result Y, performing an XORoperation between bits in the second intermediate result Y, and performing an XOR operation between the second intermediate result Y and a CRC initial value C to obtain a CRC final calculation resultZ. According to the method, the universality of a CRC calculation implementation method is improved, matrix higher power solution in a traditional parallel CRC calculation method is avoided, hardwareimplementation is easy, and the difficulty of parallel CRC calculation hardware design is reduced.

Description

technical field [0001] The invention belongs to the technical field of parallel CRC calculation, and in particular relates to a method and device for realizing parallel CRC calculation. Background technique [0002] In the process of information transmission, errors are unavoidable, and such errors may cause one or more frames transmitted on the link to be destroyed, so that the receiver receives wrong data. In order to improve the accuracy of the data received by the receiver as much as possible, the receiver needs to perform error detection on the data when receiving the data, and the receiver will actually accept the data only when the detection result is correct. Cyclic Redundancy Check (CRC) is such an error checking method, which is widely used in communication fields such as information transmission and data compression. [0003] The method of CRC verification is to calculate the binary sequence to be transmitted at the sending end with a certain rule, that is, a gen...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L1/00
Inventor 邱蔚林琳丁永林廖湘萍
Owner CETHIK GRP
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