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High-speed single bus device

A single-bus, single-wire bus technology, applied in the field of single-bus communication, can solve problems such as low data transmission efficiency

Inactive Publication Date: 2019-06-07
CIG SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The technical problem to be solved in the present invention is to propose a new high-speed single-bus device in order to overcome the low data transmission efficiency defect of the existing single-bus device

Method used

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Embodiment Construction

[0022] The preferred embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings. The following descriptions are exemplary and not limiting to the present invention. Any other similar situations will also fall within the protection scope of the present invention.

[0023] In the following detailed description, directional terms, such as "left", "right", "upper", "lower", "front", "rear", etc., are used with reference to directions described in the drawings. Components in various embodiments of the invention may be positioned in a variety of different orientations, and directional terms are used for purposes of illustration and not limitation.

[0024] refer to figure 1 Shown, according to a kind of high-speed single-bus device of preferred embodiment of the present invention, it comprises programmable chip, single-wire bus and the power supply Vcc for powering programmable chip, and output circuit and input circu...

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Abstract

The invention discloses a high-speed single bus device. The high-speed single bus device comprises a programmable chip, a single wire bus, a power supply, an output circuit and an input circuit; the programmable chip is provided with a first output interface, a second output interface, a first input interface and a second input interface. The output circuit comprises a first triode connected between a single line bus and a first output interface and the second triode connected between the single line bus and the second output interface; The output circuit is configured to be capable of outputting three levels to the single-wire bus. The input circuit comprises an amplitude discriminator connected between the single-line bus and the first input interface and a buffer connected between the single-line bus and the second input interface, and the input circuit is configured to identify three levels of the single-line bus and generate input signals corresponding to the three levels respectively. According to the high-speed single bus device, a ternary system replaces a traditional binary signal mechanism, and the data transmission efficiency is remarkably improved with low cost.

Description

technical field [0001] The invention relates to the technical field of single-bus communication, in particular to a high-speed single-bus device. Background technique [0002] Currently, all One wire bus communications use binary physical layer communication signals, which are restricted by existing communication frequencies, and the highest communication rate is 16kbps. This results in low data transmission efficiency or data communication efficiency of existing single-bus devices. [0003] Therefore, a new high-speed single-bus device is urgently needed. Contents of the invention [0004] The technical problem to be solved by the present invention is to propose a new high-speed single-bus device in order to overcome the defect of low data transmission efficiency of the existing single-bus device. [0005] The present invention solves the above technical problems by adopting the following technical solutions: [0006] The present invention provides a high-speed single-...

Claims

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Application Information

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IPC IPC(8): H04L12/40
Inventor 袁泉
Owner CIG SHANGHAI